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clarify 16-bit encoding
2020-11-15 Luke Kenneth Casson... clarify 16-bit encoding
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2020-11-15 Luke Kenneth Casson... add fmr. minor shuffle
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2020-11-15 Luke Kenneth Casson... add fmr. in 16-bit mode
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2020-11-15 Luke Kenneth Casson... add system, spr and unallocated C16
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2020-11-14 Luke Kenneth Casson... add CR operations
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2020-11-14 Luke Kenneth Casson... move 16 bit compressed to separate page
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2020-11-14 Luke Kenneth Casson... whitespace and update C tables
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2020-11-14 Luke Kenneth Casson... add OFSC 2020 talk
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2020-11-10 Luke Kenneth Casson... add minerva nmigen-soc example
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2020-11-05 Luke Kenneth Casson... add EOMA68+LibreSOC gadie section
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2020-11-05 Luke Kenneth Casson... add EOMA68+LibreSOC gadie section
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2020-11-05 Luke Kenneth Casson... extend gaddie pitch
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2020-11-05 Luke Kenneth Casson... extend gaddie pitch
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2020-11-05 Luke Kenneth Casson... extend gaddie pitch
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2020-11-05 Luke Kenneth Casson... add gaddie pitch section for LibreSOC
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2020-11-05 Luke Kenneth Casson... update nlnet FAQ
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2020-11-05 Luke Kenneth Casson... update FAQ
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2020-11-05 Luke Kenneth Casson... add name tag to FAQ
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2020-11-05 Luke Kenneth Casson... add name tag to FAQ
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2020-11-05 Luke Kenneth Casson... add name tag to FAQ
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2020-11-04 Luke Kenneth Casson... add to nlnet FAQ
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2020-11-04 Luke Kenneth Casson... add to NLnet FAQ
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2020-11-04 Luke Kenneth Casson... add to NLnet FAQ
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2020-11-04 Luke Kenneth Casson... show tab on imag
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2020-11-04 Luke Kenneth Casson... update FPGA connector images
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2020-11-04 Luke Kenneth Casson... add circuit refs
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2020-11-04 Luke Kenneth Casson... change to use 3.3v on VERSA X3
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2020-11-04 Luke Kenneth Casson... add NLnet FAQ
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2020-11-03 Luke Kenneth Casson... colour-mark X3 VERSA ECP5 JTAG pins
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2020-11-03 Luke Kenneth Casson... update jtag table, add colour to images
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2020-11-03 Luke Kenneth Casson... add stlinkv2 photos
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2020-11-03 Luke Kenneth Casson... add stlinkv2 connector images
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2020-11-03 Luke Kenneth Casson... swap wires around to match ulx3s
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2020-11-03 Luke Kenneth Casson... format table
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2020-11-03 Luke Kenneth Casson... add ECP5 JTAG connections
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2020-11-03 Luke Kenneth Casson... add image links to ECP5 page
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2020-11-03 Luke Kenneth Casson... add versa ecp5 x3 photo
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2020-11-03 Luke Kenneth Casson... add VERSA-ECP5 images, rename FPGA page
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2020-10-31 Luke Kenneth Casson... add cross-ref links
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2020-10-31 Luke Kenneth Casson... adjust image size
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2020-10-31 Luke Kenneth Casson... add description of table
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2020-10-31 Luke Kenneth Casson... change image size
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2020-10-31 Luke Kenneth Casson... add image size
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2020-10-31 Luke Kenneth Casson... add start of isa-to-virtual regs
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2020-10-31 Luke Kenneth Casson... add isa to virtual regs lookup
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2020-10-30 Luke Kenneth Casson... add clock switch resource
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2020-10-30 Luke Kenneth Casson... spelling
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2020-10-30 Luke Kenneth Casson... add 180nm tapeout to progress
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2020-10-29 Luke Kenneth Casson... whitespace
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2020-10-27 Luke Kenneth Casson... further investigation note
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2020-10-27 Luke Kenneth Casson... further investigation note
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2020-10-27 Luke Kenneth Casson... further investigation note
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2020-10-27 Luke Kenneth Casson... add link to tomasulo_transformation for notes on "nameless...
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2020-10-26 Luke Kenneth Casson... sv predication analysis update
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2020-10-26 Luke Kenneth Casson... sv predication analysis update
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2020-10-26 Luke Kenneth Casson... whitespace
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2020-10-26 Luke Kenneth Casson... whoops move predication page
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2020-10-24 Luke Kenneth Casson... discrepancy in stbux csv files
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2020-10-24 Luke Kenneth Casson... update sv_analysis to count outputs
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2020-10-24 Luke Kenneth Casson... update csv files for darn and cmprb (partly)
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2020-10-23 Luke Kenneth Casson... add litex-hub hyperram
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2020-10-23 Luke Kenneth Casson... get power/gnd naming right
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2020-10-23 Luke Kenneth Casson... move VSS/VDD pins closer together
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2020-10-23 Luke Kenneth Casson... move VSS/VDD pins closer together
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2020-10-22 Luke Kenneth Casson... add new ls180
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2020-10-20 Luke Kenneth Casson... add crossref link
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2020-10-20 Luke Kenneth Casson... column name adjustment
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2020-10-20 Luke Kenneth Casson... column name adjustment
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2020-10-20 Luke Kenneth Casson... column name adjustment
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2020-10-20 Luke Kenneth Casson... change row names
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2020-10-20 Luke Kenneth Casson... add dividing column
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2020-10-20 Luke Kenneth Casson... add FU-FU DM links
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2020-10-20 Luke Kenneth Casson... add sv utf-8 discussion
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2020-10-15 Luke Kenneth Casson... whitespace
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2020-10-15 Luke Kenneth Casson... add links to nmigen tutorial page
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2020-10-09 Luke Kenneth Casson... update sv opcodes table
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2020-10-09 Luke Kenneth Casson... update sv opcodes table
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2020-10-09 Luke Kenneth Casson... update sv opcodes table
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2020-10-09 Luke Kenneth Casson... update sv opcodes table
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2020-10-09 Luke Kenneth Casson... need to determin mnemonic for groupings in sv analysis
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2020-10-09 Luke Kenneth Casson... use [1/0]*N instead of 0x0000_0000....
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2020-10-09 Luke Kenneth Casson... selectconcat cannot cope yet
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2020-10-09 Luke Kenneth Casson... make clear length of constants in divw
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2020-10-09 Luke Kenneth Casson... change undefined to be a function
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2020-10-08 Luke Kenneth Casson... add openpower foundation membership link
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2020-10-08 Luke Kenneth Casson... add openpower foundation membership link
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2020-10-08 Luke Kenneth Casson... add data-dependent fail-on-first paper
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2020-10-07 Luke Kenneth Casson... make sv_analysys python2 compatible
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2020-10-07 Luke Kenneth Casson... add minor 59 csv FP
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2020-10-07 Luke Kenneth Casson... identify FR (FP) regs
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2020-10-07 Luke Kenneth Casson... remove -- comment
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2020-10-07 Luke Kenneth Casson... remove -- comment
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2020-10-07 Luke Kenneth Casson... add minor FP 63H csv
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2020-10-07 Luke Kenneth Casson... add minor 63L FP csv file
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2020-10-07 Luke Kenneth Casson... rlwnm moved to different category
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2020-10-07 Luke Kenneth Casson... rlwnm in wrong category (missing CR0)
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2020-10-07 Luke Kenneth Casson... remove rc and lk columns
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2020-10-07 Luke Kenneth Casson... add TODO comments
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2020-10-07 Luke Kenneth Casson... row sorting
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2020-10-07 Luke Kenneth Casson... rlwimi/nm alter CR0
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