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| 2018-01-16 | Andrew Waterman | RISC-V: Increase mult/div cost if not implemented in... 2018-01-15 Andrew Waterman <andrew@sifive.com> |
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| 2018-01-02 | Andrew Waterman | RISC-V: Fix for icache flush issue on multicore processors. |
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| 2017-12-08 | Andrew Waterman | Add srodata section support to riscv port. 2017-12-07 Andrew Waterman <andrew@sifive.com> |
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| 2017-11-07 | Andrew Waterman | RISC-V: Implement movmemsi 2017-11-07 Andrew Waterman <andrew@sifive.com> |
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| 2017-11-05 | Andrew Waterman | RISC-V: If -m[no-]strict-align is not passed, assume... 2017-11-04 Andrew Waterman <andrew@sifive.com> |
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| 2017-11-05 | Andrew Waterman | RISC-V: Set SLOW_BYTE_ACCESS=1 2017-11-04 Andrew Waterman <andrew@sifive.com> |
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| 2017-05-05 | Andrew Waterman | RISC-V: Add -mstrict-align option 2017-05-04 Andrew Waterman <andrew@sifive.com> |
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