projects / nmigen.git / shortlog
| 2018-12-12 | whitequark | fhdl.ast.Signal: fix typo. | commit | commitdiff | tree |
| 2018-12-12 | whitequark | fhdl.ast.Signal: implement attrs field. | commit | commitdiff | tree |
| 2018-12-12 | whitequark | genlib.cdc.MultiReg: self.regs should be a private... | commit | commitdiff | tree |
| 2018-12-12 | whitequark | fhdl.ast.Signal: implement width derivation from min... | commit | commitdiff | tree |
| 2018-12-12 | whitequark | genlib.cdc.MultiReg: pull in from Migen. | commit | commitdiff | tree |
| 2018-12-12 | whitequark | fhdl.ast.Signal: implement reset_less signals. | commit | commitdiff | tree |
| 2018-12-12 | whitequark | fhdl.ast.Signal: assign an internal name if tracer... | commit | commitdiff | tree |
| 2018-12-12 | whitequark | fhdl.dsl: allow f.sync["dom"] as a synonym of f.sync... | commit | commitdiff | tree |
| 2018-12-12 | whitequark | ClockDomain.{rst→reset}, for consistency with ResetInse... | commit | commitdiff | tree |
| 2018-12-12 | whitequark | Initial commit. | commit | commitdiff | tree |