2019-12-31 |
Eddie Hung | holes_module to be whitebox |
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2019-12-31 |
Eddie Hung | Rid unnecessary if |
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2019-12-31 |
Eddie Hung | Get rid of holes_mode |
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2019-12-31 |
Eddie Hung | Add abc9_ops -prep_holes |
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2019-12-31 |
Eddie Hung | Add abc9_ops -prep_dff |
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2019-12-31 |
Eddie Hung | Restore count_outputs, move process check to abc |
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2019-12-31 |
Eddie Hung | Fix struct name |
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2019-12-31 |
Eddie Hung | Merge remote-tracking branch 'origin/xaig_dff' into... |
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2019-12-31 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into eddie... |
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2019-12-30 |
Eddie Hung | write_xaiger to use scratchpad for stats; cleanup abc9 |
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2019-12-30 |
Eddie Hung | Grammar |
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2019-12-30 |
Eddie Hung | Remove submod changes |
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2019-12-30 |
Eddie Hung | Update timings for Xilinx S7 cells |
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2019-12-30 |
Eddie Hung | Remove unused |
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2019-12-30 |
Eddie Hung | Do not offset FD* box timings due to -46ps Tsu |
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2019-12-30 |
Eddie Hung | Call "proc" if processes inside whiteboxes |
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2019-12-30 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xaig_dff |
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2019-12-30 |
Eddie Hung | Add CHANGELOG entry, add abc9_{flop,keep} attr to README.md |
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2019-12-30 |
Eddie Hung | Tidy up abc9_map.v |
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2019-12-30 |
Eddie Hung | Add "synth_xilinx -dff" option, cleanup abc9 |
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2019-12-30 |
Eddie Hung | Grammar |
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2019-12-30 |
Miodrag Milanović | Merge pull request #1589 from YosysHQ/iopad_default |
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2019-12-30 |
Eddie Hung | Merge pull request #1599 from YosysHQ/eddie/retry_1588 |
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2019-12-30 |
Eddie Hung | Merge pull request #1600 from YosysHQ/eddie/cleanup_ecp5 |
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2019-12-28 |
Miodrag Milanovic | Fix new tests |
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2019-12-28 |
Miodrag Milanovic | Merge remote-tracking branch 'origin/master' into iopad... |
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2019-12-28 |
Miodrag Milanovic | Make test without iopads |
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2019-12-28 |
Miodrag Milanovic | Revert "Fix xilinx tests, when iopads are default" |
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2019-12-28 |
Eddie Hung | abc9_techmap -> _map; called from abc9 script pass... |
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2019-12-28 |
Eddie Hung | Rename abc9.cc -> abc9_techmap.cc |
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2019-12-28 |
Eddie Hung | Update resource count |
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2019-12-28 |
Eddie Hung | Nitpick cleanup for ecp5 |
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2019-12-28 |
Eddie Hung | Add #1598 testcase |
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2019-12-28 |
Eddie Hung | write_xaiger: inherit port ordering from original module |
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2019-12-28 |
Eddie Hung | Revert "Merge pull request #1598 from YosysHQ/revert... |
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2019-12-27 |
Eddie Hung | Merge branch 'master' of github.com:YosysHQ/yosys |
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2019-12-27 |
Eddie Hung | write_xaiger: simplify c{i,o}_bits |
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2019-12-27 |
David Shah | Merge pull request #1598 from YosysHQ/revert-1588-eddie... |
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2019-12-27 |
David Shah | Revert "write_xaiger: only instantiate each whitebox... |
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2019-12-27 |
Eddie Hung | Really fix it! |
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2019-12-27 |
Eddie Hung | write_xaiger: fix arrival times for non boxes |
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2019-12-25 |
Miodrag Milanovic | fixed invalid char |
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2019-12-25 |
Marcin Kościelnicki | iopadmap: Emit tristate buffers with const OE for some... |
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2019-12-25 |
Marcin Kościelnicki | Merge pull request #1593 from YosysHQ/mwk/dsp48a1-pmgen |
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2019-12-25 |
Marcin Kościelnicki | Minor nit fixes |
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2019-12-23 |
Eddie Hung | Add DSP cascade tests |
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2019-12-23 |
Eddie Hung | Fix OPMODE for PCIN->PCOUT cascades in xc6s, check... |
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2019-12-23 |
Eddie Hung | Fix CEA/CEB check |
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2019-12-23 |
Eddie Hung | Fix checking CE[AB] and for direct connections |
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2019-12-23 |
Eddie Hung | Support unregistered cascades for A and B inputs |
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2019-12-23 |
Eddie Hung | Add DSP48A* PCOUT -> PCIN cascade support |
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2019-12-23 |
Marcin Kościelnicki | xilinx: Test our DSP48A/DSP48A1 simulation models. |
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2019-12-23 |
Eddie Hung | Disable clock domain partitioning in Yosys pass, let... |
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2019-12-23 |
Eddie Hung | write_xaiger to opt instead of just clean whiteboxes |
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2019-12-22 |
Marcin Kościelnicki | xilinx_dsp: Initial DSP48A/DSP48A1 support. |
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2019-12-21 |
Miodrag Milanovic | Addressed review comments |
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2019-12-21 |
Miodrag Milanovic | iopad no op for compatibility with old scripts |
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2019-12-21 |
Miodrag Milanovic | Fix xilinx tests, when iopads are default |
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2019-12-21 |
Miodrag Milanovic | Make iopad option default for all xilinx flows |
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2019-12-20 |
Eddie Hung | Merge pull request #1588 from YosysHQ/eddie/xaiger_cleanup |
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2019-12-20 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xaig_dff |
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2019-12-20 |
Eddie Hung | Add abc9_arrival times for RAM{32,64}M |
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2019-12-20 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xaig_dff |
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2019-12-20 |
Eddie Hung | Add RAM{32,64}M to abc9_map.v |
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2019-12-20 |
Eddie Hung | Put specify/endspecify inside `` |
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2019-12-20 |
Eddie Hung | Merge pull request #1585 from YosysHQ/eddie/fix_abc9_lut |
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2019-12-20 |
Eddie Hung | write_xaiger: only instantiate each whitebox cell type... |
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2019-12-20 |
Eddie Hung | Merge pull request #1587 from YosysHQ/revert-1558-eddie... |
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2019-12-20 |
Eddie Hung | Revert "Optimise write_xaiger" |
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2019-12-20 |
Graham Edgecombe | Fix linking with Python 3.8 |
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2019-12-20 |
Graham Edgecombe | Add PYTHON_CONFIG variable to the Makefile |
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2019-12-19 |
Eddie Hung | Add RAM{32,64}M to abc9_map.v |
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2019-12-19 |
Eddie Hung | Split into $__ABC9_ASYNC[01], do not add cell->type... |
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2019-12-19 |
Eddie Hung | Merge remote-tracking branch 'origin/master' into xaig_dff |
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2019-12-19 |
Eddie Hung | Merge pull request #1581 from YosysHQ/clifford/fix1565 |
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2019-12-19 |
Eddie Hung | Merge pull request #1558 from YosysHQ/eddie/xaiger_cleanup |
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2019-12-19 |
Eddie Hung | Merge pull request #1569 from YosysHQ/eddie/fix_1531 |
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2019-12-19 |
Eddie Hung | Merge pull request #1571 from YosysHQ/eddie/fix_1570 |
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2019-12-19 |
Marcin Kościelnicki | xilinx: Add simulation models for remaining CLB primitives. |
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2019-12-19 |
Marcin Kościelnicki | xilinx_dffopt: Keep order of LUT inputs. |
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2019-12-18 |
Eddie Hung | Bump ABC again |
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2019-12-18 |
Eddie Hung | Interpret "abc9 -lut" as lut string only if [0-9:] |
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2019-12-18 |
Eddie Hung | Add "scratchpad" to CHANGELOG |
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2019-12-18 |
Eddie Hung | Merge branch 'master' of github.com:YosysHQ/yosys |
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2019-12-18 |
David Shah | Merge pull request #1563 from YosysHQ/dave/async-prld |
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2019-12-18 |
Eddie Hung | Merge pull request #1572 from nakengelhardt/scratchpad_pass |
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2019-12-18 |
Eddie Hung | Merge pull request #1584 from YosysHQ/mwk/xilinx-flaky... |
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2019-12-18 |
Marcin Kościelnicki | tests/xilinx: fix flaky mux test |
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2019-12-18 |
Marcin Kościelnicki | xilinx: Add xilinx_dffopt pass (#1557) |
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2019-12-18 |
Marcin Kościelnicki | xilinx: Improve flip-flop handling. |
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2019-12-18 |
Clifford Wolf | Send people to symbioticeda.com instead of verific.com |
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2019-12-18 |
N. Engelhardt | use extra_args |
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2019-12-18 |
Eddie Hung | Remove &verify -s |
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2019-12-18 |
Eddie Hung | Bump ABC for upstream fix |
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2019-12-18 |
Eddie Hung | Use pool<> instead of std::set<> to preserver ordering |
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2019-12-17 |
Eddie Hung | aiger frontend to user shorter, $-prefixed, names |
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2019-12-17 |
Eddie Hung | Cleanup xaiger, remove unnecessary complexity with... |
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2019-12-17 |
Eddie Hung | read_xaiger to cope with optional '\n' after 'c' |
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2019-12-17 |
Clifford Wolf | Fix sim for assignments with lhs<rhs size, fixes #1565 |
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2019-12-17 |
Eddie Hung | Cleanup |
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