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yosys.git
2019-03-16 Eddie HungWorking commit | commitdiff | tree
2019-03-14 Eddie HungReverse bits in INIT parameter for Xilinx, since MSB... commit | commitdiff | tree
2019-03-14 Eddie HungMisspell commit | commitdiff | tree
2019-03-14 Eddie HungRevert "Add shregmap -init_msb_first and use in synth_x... commit | commitdiff | tree
2019-03-14 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl commit | commitdiff | tree
2019-03-14 Eddie HungAdd shregmap -init_msb_first and use in synth_xilinx commit | commitdiff | tree
2019-03-14 Eddie HungFix cells_map for SRL commit | commitdiff | tree
2019-03-14 Eddie HungMove shregmap until after first techmap commit | commitdiff | tree
2019-03-13 Eddie HungRefactor $__SHREG__ in cells_map.v commit | commitdiff | tree
2019-03-13 Clifford WolfMerge pull request #868 from YosysHQ/clifford/fixmem commit | commitdiff | tree
2019-03-12 Clifford WolfFix a bug in handling quotes in multi-cmd lines in... commit | commitdiff | tree
2019-03-12 Clifford WolfMerge pull request #866 from YosysHQ/clifford/idstuff commit | commitdiff | tree
2019-03-12 Clifford WolfRemove ice40/cells_sim.v hack to avoid warning for... commit | commitdiff | tree
2019-03-12 Clifford WolfImprove handling of memories used in mem index expressi... commit | commitdiff | tree
2019-03-12 Clifford WolfRemove outdated "blocking assignment to memory" warning commit | commitdiff | tree
2019-03-12 Clifford WolfOnly set MEM2REG_FL_CONST_LHS/MEM2REG_FL_VAR_LHS for... commit | commitdiff | tree
2019-03-11 Clifford WolfImprove determinism of IdString DB for similar scripts commit | commitdiff | tree
2019-03-11 Eddie HungMerge pull request #864 from YosysHQ/svalabelfix commit | commitdiff | tree
2019-03-11 Clifford WolfAdd ENABLE_GLOB Makefile switch commit | commitdiff | tree
2019-03-10 Clifford WolfFix handling of cases that look like sva labels, fixes... commit | commitdiff | tree
2019-03-09 Clifford WolfFix typo in ice40_braminit help msg commit | commitdiff | tree
2019-03-09 Clifford WolfMerge pull request #859 from smunaut/ice40_braminit commit | commitdiff | tree
2019-03-09 Clifford WolfFix signed $shift/$shiftx handling in write_smt2 commit | commitdiff | tree
2019-03-09 Clifford WolfAdd $dffsr support to async2sync commit | commitdiff | tree
2019-03-09 Clifford WolfMerge pull request #858 from YosysHQ/clifford/svalabels commit | commitdiff | tree
2019-03-09 Clifford WolfMerge pull request #861 from YosysHQ/verific_chparam commit | commitdiff | tree
2019-03-09 Clifford WolfAlso add support for labels on sva module items, fixes... commit | commitdiff | tree
2019-03-09 Eddie HungUpdate help message for -chparam commit | commitdiff | tree
2019-03-09 Eddie HungAdd -chparam option to verific command commit | commitdiff | tree
2019-03-09 Eddie HungFix spelling commit | commitdiff | tree
2019-03-08 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys commit | commitdiff | tree
2019-03-08 Clifford WolfFix handling of task output ports in clocked always... commit | commitdiff | tree
2019-03-07 Sylvain Munautice40: Run ice40_braminit pass by default commit | commitdiff | tree
2019-03-07 Sylvain Munautice40: Add ice40_braminit pass to allow initialization... commit | commitdiff | tree
2019-03-07 Clifford WolfMerge pull request #856 from kprasadvnsi/master commit | commitdiff | tree
2019-03-07 Clifford WolfUse SVA label in smt export if available commit | commitdiff | tree
2019-03-07 Clifford WolfAdd support for SVA labels in read_verilog commit | commitdiff | tree
2019-03-07 Clifford WolfAdd hack for handling SVA labels via Verific commit | commitdiff | tree
2019-03-07 Clifford WolfAdd link to SF2 / igloo2 macro library guide commit | commitdiff | tree
2019-03-07 Clifford WolfImprovements in sf2 cells_sim.v commit | commitdiff | tree
2019-03-06 Clifford WolfAdd sf2 techmap rules for more FF types commit | commitdiff | tree
2019-03-06 Clifford WolfRefactor SF2 iobuf insertion, Add clkint insertion commit | commitdiff | tree
2019-03-06 Clifford WolfImprove igloo2 example commit | commitdiff | tree
2019-03-06 Clifford WolfImprove igloo2 example commit | commitdiff | tree
2019-03-06 Clifford WolfImprovements in SF2 flow and demo commit | commitdiff | tree
2019-03-06 Kali Prasadexamples/anlogic/ now also output the SVF file. commit | commitdiff | tree
2019-03-06 Eddie HungFix spelling in pmgen/README.md commit | commitdiff | tree
2019-03-06 Clifford WolfImprove igloo2 exmaple commit | commitdiff | tree
2019-03-05 Clifford WolfMerge pull request #842 from litghost/merge_upstream commit | commitdiff | tree
2019-03-05 Clifford WolfMerge pull request #850 from daveshah1/ecp5_warn_conflict commit | commitdiff | tree
2019-03-05 Clifford WolfAdd missing newline commit | commitdiff | tree
2019-03-05 Clifford WolfMerge pull request #851 from kprasadvnsi/master commit | commitdiff | tree
2019-03-05 Clifford WolfMerge pull request #852 from ucb-bar/firrtlfixes commit | commitdiff | tree
2019-03-05 Clifford WolfUse "write_edif -pvector bra" for Xilinx EDIF files commit | commitdiff | tree
2019-03-04 Jim LawsonEnsure fid() calls make_id() for consistency; tests... commit | commitdiff | tree
2019-03-04 Kali PrasadAdded examples/anlogic/ commit | commitdiff | tree
2019-03-04 Keith RothmanRevert BRAM WRITE_MODE changes. commit | commitdiff | tree
2019-03-04 David Shahecp5: Demote conflicting FF init values to a warning commit | commitdiff | tree
2019-03-04 Clifford WolfImprove igloo2 example commit | commitdiff | tree
2019-03-04 Clifford WolfUpdate igloo2 example to Libero v12.0 commit | commitdiff | tree
2019-03-03 Clifford WolfMerge pull request #848 from YosysHQ/clifford/fix763 commit | commitdiff | tree
2019-03-03 Clifford WolfMerge pull request #849 from YosysHQ/clifford/dynports commit | commitdiff | tree
2019-03-02 Clifford WolfOnly run derive on blackbox modules when ports have... commit | commitdiff | tree
2019-03-02 Clifford WolfFix error for wire decl in always block, fixes #763 commit | commitdiff | tree
2019-03-02 Clifford WolfFix $global_clock handling vs autowire commit | commitdiff | tree
2019-03-02 Clifford WolfMerge pull request #847 from YosysHQ/clifford/fix785 commit | commitdiff | tree
2019-03-02 Clifford WolfFix $readmem[hb] for mem2reg memories, fixes #785 commit | commitdiff | tree
2019-03-02 Clifford WolfMerge pull request #843 from YosysHQ/clifford/mem2regco... commit | commitdiff | tree
2019-03-02 Clifford WolfMerge pull request #845 from YosysHQ/clifford/travisnomacos commit | commitdiff | tree
2019-03-02 Clifford WolfDisable macOS builds in Travis commit | commitdiff | tree
2019-03-02 Larry DoolittleTry again for passes/pmgen/ice40_dsp_pm.h rule commit | commitdiff | tree
2019-03-01 Keith RothmanRevert FF models to include IS_x_INVERTED parameters. commit | commitdiff | tree
2019-03-01 Keith RothmanUse singular for disabling of DRAM or BRAM inference. commit | commitdiff | tree
2019-03-01 Clifford WolfMinor improvements in README commit | commitdiff | tree
2019-03-01 Clifford WolfUse mem2reg on memories that only have constant-index... commit | commitdiff | tree
2019-03-01 Clifford WolfFix "write_edif -gndvccy" commit | commitdiff | tree
2019-03-01 Keith RothmanModify arguments to match existing style. commit | commitdiff | tree
2019-03-01 Keith RothmanChanges required for VPR place and route synth_xilinx. commit | commitdiff | tree
2019-03-01 Clifford WolfMerge pull request #841 from mmicko/master commit | commitdiff | tree
2019-03-01 Miodrag MilanovicFix ECP5 cells_sim for iverilog commit | commitdiff | tree
2019-03-01 Clifford WolfImprove "read" error msg commit | commitdiff | tree
2019-03-01 Clifford WolfMerge pull request #836 from elmsfu/ice40_2bit_ram_rw_mode commit | commitdiff | tree
2019-03-01 Clifford WolfHotfix for "make test" commit | commitdiff | tree
2019-03-01 Clifford WolfMerge pull request #837 from YosysHQ/clifford/fix835 commit | commitdiff | tree
2019-03-01 Clifford WolfFix multiple issues in wreduce FF handling, fixes #835 commit | commitdiff | tree
2019-03-01 Elmsice40: use 2 bits for READ/WRITE MODE for SB_RAM map commit | commitdiff | tree
2019-02-28 Clifford WolfMerge pull request #834 from YosysHQ/clifford/siminit commit | commitdiff | tree
2019-02-28 Clifford WolfAdd "write_verilog -siminit" commit | commitdiff | tree
2019-02-28 Larry DoolittleReduce amount of trailing whitespace in code base commit | commitdiff | tree
2019-02-28 Clifford WolfFix pmgen for in-tree builds commit | commitdiff | tree
2019-02-28 Clifford WolfMerge pull request #794 from daveshah1/ecp5improve commit | commitdiff | tree
2019-02-28 Clifford WolfMerge pull request #827 from ucb-bar/firrtlfixes commit | commitdiff | tree
2019-02-28 Clifford WolfFix pmgen for out-of-tree build commit | commitdiff | tree
2019-02-28 Eddie HungRemove SRL16/32 from cells_xtra commit | commitdiff | tree
2019-02-28 Eddie HungAdd SRL16 and SRL32 sim models commit | commitdiff | tree
2019-02-28 Eddie HungFix SRL16/32 techmap off-by-one commit | commitdiff | tree
2019-02-28 Clifford WolfMerge pull request #833 from YosysHQ/clifford/fix831 commit | commitdiff | tree
2019-02-28 Clifford WolfFix smt2 code generation for partially initialized... commit | commitdiff | tree
2019-02-28 Clifford WolfMerge pull request #832 from YosysHQ/supercover commit | commitdiff | tree
2019-02-28 Eddie Hungsynth_xilinx to call shregmap with enable support commit | commitdiff | tree
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