litex.git
2015-07-24 Florent Kermarreclitepcie/frontend/dma: group loop index and count in...
2015-07-24 Florent Kermarrecmisoclib/com/uart: cleanup and add irq condition parameters
2015-07-22 Florent Kermarreclitepcie/frontend/dma: add loop counter (useful to...
2015-07-22 Florent Kermarreclitepcie: use data instead of dat in dma_layout (allow...
2015-07-22 Florent Kermarreclitepcie: use optional platform.misoc_path to add litep...
2015-07-19 Sebastien Bourdeauducquart: remove option to refill HW from uart_write
2015-07-19 Robert Jordensuart: support async phys
2015-07-19 Robert Jordensuart.c: rx overflow fix and tx simplification
2015-07-14 Florent Kermarrecbios: add romboot
2015-07-13 Florent Kermarrecmake.py: use sys.path.insert(0...) to allow external...
2015-07-13 Florent Kermarrecmisoclib/video/dvisampler: add fifo_depth parameter
2015-07-09 Florent Kermarrecwishbone2lasmi: fix "READ_DATA" state
2015-07-07 Florent Kermarrectools/flterm.py: fix kernel-adr support
2015-07-06 Florent Kermarrecliteeth/core: add with_icmp parameter
2015-07-05 Florent Kermarrecuse sets for leave_out
2015-07-05 Florent Kermarrecliteeth/core/mac: adapt depth on AsyncFIFOs according...
2015-07-05 Florent Kermarrecliteeth: small logic optimizations on mac (eases timing...
2015-07-04 Florent Kermarrecsoftware/bios: call eth_mode only if we have an etherne...
2015-07-02 Yann Sionneaubios: show memtest command in help
2015-06-28 Sebastien Bourdeauducqsoc: support constants without value
2015-06-27 Sebastien Bourdeauducqlibcompiler-rt: add fixdfdi
2015-06-26 Joe Brittonflterm.py: use serial_for_url
2015-06-25 Florent Kermarreclitesata/example_designs: fix core generation (RAID...
2015-06-25 enjoy-digitalMerge pull request #14 from olofk/misc_fixes
2015-06-25 Olof Kindgrenlitesata/test: Add missing dependency on scrambler...
2015-06-25 Olof Kindgrenlitesata/example_designs: Add missing clock in phy...
2015-06-23 Florent Kermarrecliteeth/example_designs: use new Keep SynthesisDirective
2015-06-23 Florent Kermarrecsoftware/bios/sdram: flush dcache and l2 in memtest...
2015-06-23 Robert Jordenspipistrello: run at 83+1/3 MHz, cleanup CRG
2015-06-22 Florent Kermarrecliteeth/software: fix wishbone bridge
2015-06-22 Florent Kermarrecliteeth/example_designs: add false path between clock...
2015-06-22 Florent Kermarrecliteeth/core/arp: fix table timer (wait_timer adaptatio...
2015-06-22 Florent Kermarrecliteeth/core/arp: fix missing MAC address in ARP reply
2015-06-19 Florent Kermarrecsoftware/libbase/system: fix flush_l2_cache
2015-06-19 Florent Kermarrecsoc/sdram: add L2_SIZE constant and avoid declaring...
2015-06-17 Sebastien Bourdeauducqindentation
2015-06-17 Florent Kermarrecsoc/sdram: add capability to share L2 cache in multi...
2015-06-17 Florent Kermarrecsdram: use wishbone cache as L2 cache and add optional...
2015-06-10 Florent Kermarreclitesata: use 200MHz clock and SATA3 (6.0Gb/s) on all...
2015-06-10 Florent Kermarreclitesata/phy/k7: apply AR# 63869 to keep CDR in hold...
2015-06-02 Florent Kermarrecsdram: use new Migen Converter in Minicon frontend...
2015-06-02 Florent Kermarrecsdram/phy: fix simphy memory usage
2015-05-29 Florent Kermarrecsdram: refactor minicon and fix issues with DDRx memories
2015-05-27 Yann Sionneauspiflash: now using 64k sectors
2015-05-27 Yann Sionneauspiflash: cleanup unnecessary parenthesis
2015-05-26 Sebastien Bourdeauducqlitesata: more doc fixes
2015-05-26 Sebastien BourdeauducqMerge branch 'master' of https://github.com/m-labs...
2015-05-26 Sebastien Bourdeauducqlitesata: doc fixes
2015-05-26 Florent Kermarrecliteata: fix spelling & mistakes in doc
2015-05-25 Florent Kermarreclitesata: rework frontend doc and add striping, mirroring
2015-05-25 Florent Kermarreclitesata: add mirroring
2015-05-25 Florent Kermarreclitesata/examples_designs: add striping
2015-05-25 Florent Kermarreclitesata/core/link: move buffer on CONTInserter (seems...
2015-05-25 Florent Kermarrecliteusb/core/packet: fix missing ,
2015-05-23 Florent Kermarreclitesata: add striping module for use of multiple HDDs.
2015-05-23 Florent Kermarreclitesata: do some cleanup and prepare for RAID
2015-05-12 Florent Kermarreccores: replace Timeout with new WaitTimer
2015-05-09 Florent Kermarrecuart: rename wishbone to bridge
2015-05-09 Florent Kermarrecuart: remove litescope dependency for UARTWishboneBridg...
2015-05-08 Florent Kermarrecliteusb/frontend/dma: remove +4 to length for CRC ...
2015-05-07 Florent Kermarrecliteusb/phy/ft245: rename "ftdi" clock domain to "usb"
2015-05-07 Florent Kermarreclitesata: fix packets figure in frontend doc
2015-05-07 Sebastien BourdeauducqREADME: add note about submodules
2015-05-06 Florent Kermarreclitesata: add doc for frontend
2015-05-06 Florent Kermarreclitesata: cleanup README/doc
2015-05-05 Florent Kermarreclitesata: use (some) settings from vivado 2015.1, try...
2015-05-05 Sebastien Bourdeauducqspiflash: fix miso bitbang with large DQ
2015-05-04 Florent Kermarrecsoc/sdram: Vivado 2015.1 still does not fix issue with...
2015-05-02 Florent Kermarrecmisoclib/cpu: merge git.py in identifier
2015-05-02 Florent Kermarrecliteusb: add simple example design with wishbone bridge...
2015-05-02 Florent Kermarrecrename shadow_address to shadow_base (more appropriate...
2015-05-02 Florent Kermarrecliteeth/core/mac: minor cleanup
2015-05-02 Florent Kermarrecliteusb/frontend/wishbone: use new packetized mode...
2015-05-02 Florent Kermarreclitescope/frontend/wishbone: add support for packetized...
2015-05-02 Florent Kermarrecliteusb/software/wishbone: optimize writes/reads (send...
2015-05-02 Florent Kermarrecdo more test with last changes fix small issues
2015-05-02 Florent Kermarrecliteeth: move mac to core
2015-05-02 Florent Kermarreccores: avoid having too much directories when possible...
2015-05-02 Florent Kermarrecuse similar names for wishbone bridges and move wishbon...
2015-05-02 Zach Smithtargets/pipistrello: add flash sizes
2015-05-01 Florent Kermarreclitescope: add basic LiteScopeUSB2WishboneFTDIDriver...
2015-05-01 Florent Kermarreclitescope: rename host directory to software (to be...
2015-05-01 Florent Kermarrecliteusb: add basic wishbone frontend (We could also...
2015-05-01 Florent Kermarreclitescope: fix missing source ack on LiteScopeWishboneB...
2015-05-01 Florent Kermarreclitescope/bridge: create a generic wishbone bridge...
2015-05-01 Florent Kermarreclitescope: use full name in io.py
2015-05-01 Florent Kermarrectargets/minispartan6: add USBSoC (working, should also...
2015-05-01 Florent Kermarrecliteusb: refactor software (use python instead of libft...
2015-05-01 Florent Kermarrecliteusb: continue refactoring (virtual UART and DMA...
2015-05-01 Florent Kermarreccom/uart: add tx and rx fifos.
2015-04-28 Florent Kermarrecliteusb: add ft2232h_sync_tb
2015-04-28 Florent Kermarrecliteusb: add FT2232HPHYAsynchronous PHY (Minispartan6...
2015-04-28 Florent Kermarrecliteusb: continue refactoring and add core_tb (should...
2015-04-28 Florent Kermarrecmisoclib/com/uart: remove liteeth dependency (copy...
2015-04-28 Florent Kermarrecliteeth: use Migen's Packetizer/Depacketizer, remove...
2015-04-27 Florent Kermarreclitesata: cleanup link
2015-04-27 Florent KermarrecMerge branch 'master' of https://github.com/m-labs...
2015-04-27 Florent Kermarrecliteusb: begin refactoring and simplification (wip)
2015-04-27 Florent Kermarrecliteeth: use new Migen modules from actorlib (avoid...
2015-04-27 Florent Kermarreclitepcie: use new Migen modules from actorlib (avoid...
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