2021-06-23 |
Luke Kenneth... | add FFT/DCT to titles |
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2021-06-23 |
Luke Kenneth... | add SV FP arithmetic in "Overflow" mode for FFT/DCT +/- |
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2021-06-23 |
Luke Kenneth... | use SHL64 function for shift because "<<" operator... |
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2021-06-23 |
Luke Kenneth... | add in bitreverse function call into svfixedload |
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2021-06-23 |
Luke Kenneth... | add RC and SVD/SVDS-Form to svfixedload |
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2021-06-23 |
Luke Kenneth... | add svfixedload.mdwn at correct place |
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2021-06-23 |
Luke Kenneth... | add SVD-Form and SVDS-Form, variants of fixedload for... |
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2021-06-19 |
Luke Kenneth... | 128 regs added to simulator - works |
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2021-06-19 |
Luke Kenneth... | sigh cannot add comments at end of SV lines in SVP64... |
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2021-06-19 |
Luke Kenneth... | increase number of registers to 128 in pypowersim |
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2021-06-19 |
Luke Kenneth... | set regfile in ISACaller equal to length of initial... |
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2021-06-19 |
Luke Kenneth... | add mapreduce "reverse gear" unit tests |
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2021-06-19 |
Luke Kenneth... | add mapreduce "reverse gear" to PowerDecoder2. gets... |
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2021-06-19 |
Luke Kenneth... | add decode of "reverse gear" in SVP64 reduce mode |
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2021-06-19 |
Luke Kenneth... | add "reverse-gear" mode to mapreduce in SVP64 |
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2021-06-18 |
Luke Kenneth... | add SV Context SPRs (SVCTX0-7) |
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2021-06-18 |
Luke Kenneth... | add SVR-Form and associated fields |
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2021-06-18 |
Luke Kenneth... | add four SVSHAPE SPRs for REMAP |
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2021-06-17 |
Luke Kenneth... | add SV "Context Propagation" Form |
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2021-06-17 |
Luke Kenneth... | add SVP64REMAP Record |
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2021-06-17 |
Luke Kenneth... | shuffle comments |
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2021-06-17 |
Luke Kenneth... | fix MP3 CODEC basic demo by using fmuls and fadds/fsubs... |
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2021-06-16 |
Luke Kenneth... | sorted out order of FPMULADD32 helper, only have roundi... |
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2021-06-16 |
Luke Kenneth... | add extra comments to mp3 svp64 codec assembler |
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2021-06-16 |
Luke Kenneth... | fix fmadds/fmsubs FPMULADD32 helper |
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2021-06-16 |
Luke Kenneth... | more code-comments in mp3 codec svp64 example |
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2021-06-16 |
Luke Kenneth... | although unused read first sum from *dither_state |
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2021-06-16 |
Luke Kenneth... | use addi where sv.addi is inappropriate (scalar values) |
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2021-06-16 |
Luke Kenneth... | reorder arguments to FPMULADD32 to match pseudocode |
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2021-06-16 |
Luke Kenneth... | use fnmsubs instead of fmadds followed by fsubs |
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2021-06-16 |
Luke Kenneth... | fnmadds and fnmsubs were inverted |
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2021-06-16 |
Luke Kenneth... | ad fnmadd and fnmsubs to ISA pseudocode |
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2021-06-16 |
Luke Kenneth... | reverting removal of tmpsum and tmpsum2, not using... |
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2021-06-15 |
Luke Kenneth... | whoops forgot import |
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2021-06-15 |
Luke Kenneth... | whoops still using DOUBLE(SINGLE(x)) rather than DOUBLE... |
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2021-06-15 |
Luke Kenneth... | remove predicate mask r30, no longer needed |
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2021-06-15 |
Luke Kenneth... | no need for tmpsu or tmpsum2, fmadds if replaced with... |
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2021-06-15 |
Luke Kenneth... | use new sv.fmadds SVP64 instruction in MP3 CODEC assembler |
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2021-06-15 |
Luke Kenneth... | fix sv_analysis.py for 3R-1W-CRo case, add fmadds/fmsub... |
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2021-06-15 |
Luke Kenneth... | mark as possible bug, the fneg sum,sum |
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2021-06-15 |
Luke Kenneth... | add fmadds and fmsubs to Power ISA pseudo-code, add... |
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2021-06-15 |
Luke Kenneth... | remove negate of sum for last value in SVP64 MP3 CODEC... |
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2021-06-15 |
Luke Kenneth... | SVP64 mp3 assembler almost correct |
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2021-06-15 |
Luke Kenneth... | add comments into mapreduce example |
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2021-06-15 |
Luke Kenneth... | whoops overlap of fv0-2 with sum/2/tmp, move further up |
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2021-06-14 |
Luke Kenneth... | sigh bug in setvl, temporarily setting to 7 not 8 |
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2021-06-14 |
Luke Kenneth... | nope, win = win2 + 31 |
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2021-06-14 |
Luke Kenneth... | guessing probably supposed to be 128 not 124 |
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2021-06-14 |
Luke Kenneth... | tmpsum2 probably needed to be fp3 |
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2021-06-14 |
Luke Kenneth... | temporary move regs into range 0-31 |
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2021-06-14 |
Luke Kenneth... | recognise setvl instruction during SVP64 translation |
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2021-06-14 |
Luke Kenneth... | whoops forgot format-to-format conversion |
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2021-06-14 |
Luke Kenneth... | series of text macro formats to look for: x.v, x.s (x) |
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2021-06-14 |
Luke Kenneth... | add basic "macro" (.set) support to SVP64Asm |
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2021-06-14 |
Lauri Kasanen | mp3_0 initial sv |
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2021-06-14 |
Lauri Kasanen | Reorder mp3_0_basicsv back to the C loop style |
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2021-06-14 |
Lauri Kasanen | Update mp3_1.gpr missed in b04990f79c |
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2021-06-09 |
Luke Kenneth... | add some more comments in the mapreduce svp64 examples... |
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2021-06-09 |
Luke Kenneth... | add sv.fmuls/mr - mapreduce - FP multiply-single test |
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2021-06-09 |
Luke Kenneth... | add first scalar mapreduce SVP64 example |
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2021-06-09 |
Luke Kenneth... | add what might turn out to be only what is needed to... |
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2021-06-08 |
Luke Kenneth... | whoops, carry-over during rounding picks MSB not LSB |
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2021-06-08 |
Luke Kenneth... | whoops copy sign over on zero |
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2021-06-08 |
Luke Kenneth... | exponent bitwidth in DOUBLE2SINGLE needs to be 11 bits... |
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2021-06-08 |
Luke Kenneth... | use new auto-generated DOUBLE2SINGLE from isafunctions... |
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2021-06-08 |
Luke Kenneth... | add detection of function parameters in parser |
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2021-06-08 |
Luke Kenneth... | add better debug logs and asserts for SelectableInt... |
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2021-06-08 |
Luke Kenneth... | add support in pyparser for negative numbers |
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2021-06-07 |
Luke Kenneth... | whoops fraction in fpfromint off-by-one |
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2021-06-03 |
Luke Kenneth... | whoops, in1_isvec and dec_bi are optional |
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2021-06-02 |
Luke Kenneth... | fmuls test showing rounding error against qemu |
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2021-06-02 |
Luke Kenneth... | found FP single-conversion error, from the pseudocode... |
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2021-06-02 |
Luke Kenneth... | move mp3 test params slightly higher up so as not to... |
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2021-06-02 |
Luke Kenneth... | add commented-out debug prints |
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2021-06-02 |
Luke Kenneth... | whoops sorting SPRs, stop that for now |
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2021-06-02 |
Luke Kenneth... | get qemu FP regs correctly |
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2021-06-02 |
Luke Kenneth... | FP basic qemu sim, testing fadds loads and stores |
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2021-06-02 |
Luke Kenneth... | appears that the FP operation takes place at full 64... |
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2021-06-01 |
Luke Kenneth... | whoops missing argument |
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2021-06-01 |
Luke Kenneth... | move spot-check mem compare to a function |
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2021-06-01 |
Luke Kenneth... | check both LD and ST in qemu compare |
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2021-06-01 |
Luke Kenneth... | bizarre, GPR 3 is set by qemu to non-zero at startup. |
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2021-06-01 |
Luke Kenneth... | whoops start basic sim from 0x20000000 |
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2021-06-01 |
Luke Kenneth... | bit more memdump debugging on qemu sim |
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2021-06-01 |
Luke Kenneth... | comment cleanup, record last LD/ST address in simulator |
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2021-06-01 |
Luke Kenneth... | whoops crank down the debug level |
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2021-06-01 |
Luke Kenneth... | sorting out qemu co-simulation to read/write FP regs |
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2021-05-30 |
Luke Kenneth... | add "normal" element-strided LD/ST decode/support to... |
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2021-05-29 |
Luke Kenneth... | comments |
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2021-05-29 |
Luke Kenneth... | add unit-strided LD/ST ISACaller SVP64 unit test |
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2021-05-29 |
Luke Kenneth... | initialise SVP64 ld/st mode decoding in PowerDecoder2 |
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2021-05-29 |
Luke Kenneth... | comments |
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2021-05-29 |
Luke Kenneth... | extract LDST mode from SVP64 RM |
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2021-05-29 |
Luke Kenneth... | can't stand python 'format' |
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2021-05-29 |
Luke Kenneth... | dump memory from qemu in pypowersim |
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2021-05-29 |
Luke Kenneth... | add SVP64 RM LDST mode enum |
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2021-05-28 |
Lauri Kasanen | Begin on SV for mp3_0 |
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2021-05-28 |
Luke Kenneth... | print out offset for load address in hex |
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2021-05-28 |
Luke Kenneth... | probably got MSR.FP bit set... maybe |
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2021-05-28 |
Luke Kenneth... | add quick stfd test to make sure MSR.FP is set |
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next |