riscv-isa-sim.git
2017-02-22 Tim NewsomeDon't waste time spinning in place in debug mode
2017-02-18 Tim NewsomeCompress log output of jump-to-self loops.
2017-02-16 Tim NewsomeRemove noisy debugs.
2017-02-16 Tim NewsomeSet cmderr when data is accessed while busy.
2017-02-16 Tim NewsomeImplement autoexec. DMI op 2 is just write now.
2017-02-15 Tim NewsomeImplement resume (untested).
2017-02-14 Tim NewsomeImplement program buffer preexec/postexec.
2017-02-13 Tim Newsomedbus -> dmi
2017-02-13 Tim NewsomeAbstract register read mostly working.
2017-02-12 Tim NewsomeFix stack overflow and support --rbb-port=0
2017-02-11 Tim NewsomeEntering debug mode now jumps to "dynamic rom"
2017-02-10 Tim NewsomeImplement hartstatus field.
2017-02-10 Tim NewsomeRemove gdbserver support.
2017-02-09 Tim NewsomeAdd writable ibuf and data registers.
2017-02-09 Tim NewsomeServe up a correct dmcontrol register.
2017-02-07 Tim NewsomeOpenOCD does a dmi read and gets dummy value back.
2017-02-07 Tim NewsomeRemove unnecessary circular buffer code.
2017-02-07 Tim NewsomeRefactor remote bitbang code.
2017-02-03 Tim NewsomeOpenOCD RISC-V code now gets to scan out dtmcontrol.
2017-02-03 Tim NewsomeOpenOCD can now scan out the hacked IDCODE.
2017-02-03 Tim NewsomeOpenOCD connects, and sends some data that we receive.
2017-01-08 Andrew WatermanOnly allow SIP.SSIP to be toggled if the interrupt...
2017-01-08 Andrew WatermanMake SIP.STIP read-only
2017-01-06 David CravenComply with GNU coding standards.
2016-12-30 Brian CampbellOnly read exception flag in gdb register read/write...
2016-12-21 Brian CampbellFix gdb communication error (#82)
2016-12-17 Stefan O'RearUse correct format codes for reg_t and size_t
2016-12-16 Tim NewsomeFix single stepping over faulting instructions. (#80)
2016-12-12 Tim NewsomeReuse the ebreak constants in encoding.h.
2016-12-01 Andy WrightAdded comments about the modified Duff's Device in...
2016-11-14 Andrew WatermanFix 32-bit host portability bug
2016-11-12 Ben GamariEnsure that g++ knows it is building a PCH (#75)
2016-11-10 Andrew WatermanAMOs should always return store faults, not load faults
2016-10-31 Tim NewsomeMake reading/writing fpu regs work.
2016-10-31 Tim NewsomeMinor code cleanup.
2016-10-31 Tim NewsomeCheck for exception after register write.
2016-10-28 Tim NewsomeCheck for exception after reading a register.
2016-10-28 Tim NewsomeFix error message.
2016-10-25 Tim NewsomeIncrease gdb receive buffer.
2016-10-10 Andrew WatermanDon't force load trigger timing to After
2016-10-07 Tim NewsomeDon't die when gdb thinks XLEN is 64 but it's 32.
2016-09-30 Tim NewsomeReturn an error to gdb when memory reads fail. (#71)
2016-09-29 Tim NewsomeUpdate trigger behavior. (#70)
2016-09-13 Scott Beamerrestore clang support by fixing printf identifiers
2016-09-10 Andrew Watermanallow MAFDC bits in MISA to be modified
2016-09-06 Tim NewsomeRemove generic debug tests. (#65)
2016-09-02 Andrew WatermanMerge pull request #62 from riscv/trigger
2016-09-02 Tim NewsomeMerge branch 'master' into trigger
2016-09-02 Tim NewsomeRebuild debug ROM because CSR encoding changed.
2016-09-02 Tim NewsomeSupport triggers on TLB misses.
2016-09-01 Tim NewsomeTheoretically support trigger timing.
2016-08-31 Tim NewsomeRename tdata[0-2] to tdata[1-3].
2016-08-31 Tim NewsomeSave/restore tselect. Set dmode.
2016-08-29 Tim NewsomeFix indent.
2016-08-29 Tim NewsomeRename tdata0--tdata2 to tdata1--tdata3.
2016-08-27 Andrew WatermanAdd (degenerate) performance counter facility
2016-08-26 Andrew WatermanAllow reads from tdrdata registers
2016-08-26 Andrew Watermanpartially update spike to newer debug spec
2016-08-26 Andrew WatermanFix spike interactive (-d) mode
2016-08-23 Andrew Watermanremove HWBPCOUNT field of DCSR
2016-08-22 Tim NewsomeImplement address and data triggers.
2016-08-17 Andrew WatermanAllow mstatus.MPP to store bad values; instead, validat...
2016-08-16 Colin Schmidtremove old rvc directory (#61)
2016-07-28 Tim NewsomeAdd support for virtual priv register. (#59)
2016-07-22 Andrew WatermanSet U bit in misa register
2016-07-19 Tim NewsomeMake address translation work in 32-bit. (#58)
2016-07-13 Tim NewsomeFix single step over csrw instructions. (#57)
2016-07-12 Andrew WatermanDon't treat RVC NOP as illegal instruction
2016-07-12 Andrew WatermanFix page table walker not respecting valid bit
2016-07-06 Andrew WatermanUpdate to new PTE format
2016-07-01 Tim NewsomeRemove debug printf that was cluttering up output.
2016-06-29 Andrew WatermanDisassemble RVC instructions based on XLEN
2016-06-28 Tim NewsomeMake gdbserver code work with small Debug RAM.
2016-06-28 Tim NewsomeSupport debugging 32-bit spike instances.
2016-06-23 Andrew WatermanParameterize debug ROM contents on XLEN
2016-06-23 Andrew WatermanRemove fence.i from debug ROM
2016-06-23 Andrew WatermanDon't use I$ in debug mode
2016-06-23 Andrew WatermanRemove legacy HTIF; implement HTIF directly
2016-06-23 Andrew WatermanFix paddr_bits computation prior to VM setup
2016-06-18 Andrew WatermanMerge sasid into sptbr
2016-06-09 Andrew WatermanTrap on tdrdata registers when tdrselect[XLEN-1]=0
2016-06-09 Jonathan Neuschäfermake check: Fail if the tests failed
2016-06-09 Tim NewsomeFix 2 bugs in Debug ROM: (#52)
2016-06-09 Andrew WatermanAdd degenerate HW breakpoint implementation
2016-06-03 Tim NewsomeKeep DCSR_XDEBUGVER unsigned.
2016-06-03 neuschaeferMinor usability improvements (#48)
2016-06-03 Tim NewsomeDCSR cause was moved, bug debug ROM wasn't updated
2016-06-02 Tim NewsomeFix 'make check' when run from build directory.
2016-06-01 Andrew WatermanFix build when not building inside root directory
2016-06-01 Andrew WatermanAdd gitignore
2016-06-01 Tim NewsomeMove sethaltnot and cleardebint.
2016-05-24 Tim NewsomeNew encoding.h for new CSR addresses.
2016-05-24 Tim NewsomeMove cleardebint, per spec.
2016-05-23 Tim NewsomeUse .word for mret, for now.
2016-05-23 Tim NewsomeChange DCSR bits to match spec.
2016-05-23 Tim NewsomeKill spike as soon as the test is done with it.
2016-05-23 Tim NewsomeLink standalone programs at 0x80010000.
2016-05-23 Tim NewsomeTurn off debugging.
2016-05-23 Tim NewsomeTell gdb we can handle large packets.
2016-05-23 Tim NewsomeFix writing odd numbers of bytes to odd addresses.
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