yosys.git
2022-02-14 Zachary Snowverilog: support for time scale delay values
2022-02-14 Kamil RakoczyFix access to whole sub-structs (#3086)
2022-02-13 github-actions... Bump version
2022-02-12 Marcelina Kościelnickagowin: Add remaining block RAM blackboxes.
2022-02-12 github-actions... Bump version
2022-02-11 Zachary Snowverilog: fix dynamic dynamic range asgn elab
2022-02-11 Zachary Snowverilog: fix const func eval with upto variables
2022-02-11 Claire XenMerge pull request #2376 from nmoroze/clk2ff-better...
2022-02-11 Miodrag MilanovićMerge pull request #3164 from zachjs/fix-ast-warn
2022-02-11 Claire XenMerge branch 'master' into clk2ff-better-names
2022-02-11 Claire XenMerge pull request #2019 from boqwxp/glift
2022-02-10 github-actions... Bump version
2022-02-09 Miodrag MilanovićMerge pull request #3193 from YosysHQ/micko/verific_f
2022-02-09 Miodrag MilanovicAdd ability to override verilog mode for verific -f...
2022-02-09 Marcelina Kościelnickagowin: Fix LUT RAM inference, add more models.
2022-02-09 Marcelina Kościelnickaecp5: Fix DPR16X4 sim model.
2022-02-08 github-actions... Bump version
2022-02-07 Miodrag MilanovicNext dev cycle
2022-02-07 Miodrag MilanovicRelease version 0.14 yosys-0.14
2022-02-07 Miodrag MilanovicUpdate CHANGELOG and manual
2022-02-07 Miodrag MilanovićMerge pull request #3185 from YosysHQ/micko/co_sim
2022-02-07 github-actions... Bump version
2022-02-06 Marcelina Kościelnickanexus: Fix arith_map CO signal.
2022-02-04 Miodrag MilanovicError detection for co-simulation
2022-02-04 Miodrag Milanovicbug fix and cleanups
2022-02-03 github-actions... Bump version
2022-02-02 Miodrag MilanovićMerge pull request #3183 from YosysHQ/micko/nto1mux
2022-02-02 Miodrag MilanovicUse bmux for NTO1MUX
2022-02-02 Miodrag MilanovicAdd test cases for co-simulation
2022-02-02 Miodrag MilanovićMerge pull request #3182 from yrabbit/wip-doc2
2022-02-02 YRabbitCorrect a typo in the manual
2022-02-02 Miodrag MilanovicFix Visual Studio build
2022-02-02 Miodrag Milanovicrespect hide_internal flag
2022-02-02 Miodrag Milanovicunify cycles counting and cleanup
2022-02-02 Miodrag Milanovicadded stimulus mode and param check
2022-02-02 Scott ThibaultUpdate comment
2022-02-02 Scott ThibaultFix unextend method for signed constants
2022-01-31 Miodrag Milanovicerror when no signal found
2022-01-31 Miodrag MilanovićMerge pull request #3176 from higuoxing/fix-ref-manual
2022-01-31 Miodrag MilanovicCleanup
2022-01-31 Miodrag MilanovicCompare bits when not all are defined
2022-01-31 Miodrag MilanovicCleanup
2022-01-31 Miodrag Milanovicmessage update
2022-01-31 Miodrag MilanovicDisplay simulation time data
2022-01-31 Miodrag MilanovicUse edges when explicit
2022-01-31 Miodrag MilanovicUpdating initial state and checks
2022-01-31 Miodrag MilanovicFix scope
2022-01-31 github-actions... Bump version
2022-01-31 Marcelina Kościelnickaverilog backend: Emit a `wire` for ports as well.
2022-01-30 Xing GUOFix the help message of synth_quicklogic.
2022-01-30 Marcelina Kościelnickaopt_reduce: Add $bmux and $demux optimization patterns.
2022-01-29 github-actions... Bump version
2022-01-28 Marcelina KościelnickaAdd $bmux and $demux cells.
2022-01-28 Miodrag Milanoviccheck if stop before start
2022-01-28 Miodrag Milanovicset initial state, only flip-flops
2022-01-28 Miodrag Milanovicignore not found private signals
2022-01-28 Miodrag Milanovicpreserve VCD mangled names
2022-01-28 Miodrag Milanovicdetect edges even when x
2022-01-28 Miodrag Milanovicrecursive check
2022-01-28 Miodrag Milanoviccleanup
2022-01-28 Miodrag MilanovicDo actual compare
2022-01-28 Miodrag MilanovicFix for limit_range_end when not writing vcd
2022-01-28 Miodrag MilanovicAdd more options and time handling
2022-01-28 Marcelina Kościelnickaopt_dff: Don't mutate muxes while ModWalker is active.
2022-01-28 Marcelina Kościelnickakernel/mem: Add read-first semantic emulation code.
2022-01-28 github-actions... Bump version
2022-01-27 Marcelina Kościelnickamanual: Fix a custom pass example.
2022-01-27 Marcelina Kościelnickamemory_bram: Make use of new mem emulation functions...
2022-01-27 Marcelina Kościelnickakernel/mem: Add functions to emulate read port enable...
2022-01-27 github-actions... Bump version
2022-01-26 Miodrag Milanovićchange to windows-2019
2022-01-26 Miodrag Milanovicupdate version
2022-01-26 Miodrag MilanovicDisplay values of outputs
2022-01-26 Miodrag MilanovicFix tabs/spaces
2022-01-26 Miodrag MilanovicCheck if stimulated
2022-01-26 Miodrag MilanovicRead fst and use data to set inputs
2022-01-26 Miodrag MilanovicAdd fstdata helper class
2022-01-26 Miodrag MilanovicCleanup of config to support platforms
2022-01-26 Miodrag MilanovicAdd ability to write to FST file
2022-01-25 Miodrag MilanovicAdd FST library
2022-01-20 github-actions... Bump version
2022-01-19 gatecatnexus: Fix BB sim model
2022-01-19 Miodrag MilanovicRemoved dbits 8 since 9 will always be picked
2022-01-19 Miodrag MilanovićMerge pull request #3120 from Icenowy/anlogic-bram
2022-01-18 Zachary Snowfix dumpAst() compilation warning
2022-01-18 github-actions... Bump version
2022-01-17 Miodrag MilanovićMerge pull request #3162 from YosysHQ/mmicko/windows_gu...
2022-01-17 Miodrag MilanovićUpdate guidelines/Windows
2022-01-17 N. EngelhardtMerge pull request #3145 from nakengelhardt/advertise_s...
2022-01-17 N. Engelhardtmention distributions' package manager
2022-01-17 Miodrag MilanovićAdd info about VS build
2022-01-12 github-actions... Bump version
2022-01-11 Miodrag MilanovicForgot one
2022-01-11 Miodrag MilanovicChange url to https
2022-01-11 Miodrag MilanovicNext dev cycle
2022-01-11 Miodrag MilanovicRelease version 0.13 yosys-0.13
2022-01-11 Miodrag MilanovicUpdate CHANGELOG
2022-01-09 github-actions... Bump version
2022-01-08 Zachary Snowsv: auto add nosync to certain always_comb local vars
2022-01-08 Zachary Snowsv: fix size cast internal expression extension
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