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yosys.git
2019-02-26
Jim Lawson
Fix FIRRTL to Verilog process instance subfield assignment.
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2019-02-24
Clifford Wolf
Minor changes ontop of 71bcc4c: Remove hierarchy warnin...
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2019-02-24
Clifford Wolf
Merge pull request #812 from ucb-bar/arrayhierarchyfixes
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2019-02-24
Clifford Wolf
Cleanups in ARST handling in wreduce
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2019-02-24
Clifford Wolf
Merge pull request #824 from litghost/fix_reduce_on_ff
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2019-02-24
Clifford Wolf
Fix handling of defparam for when default_nettype is...
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2019-02-24
Clifford Wolf
Check if Verific was built with DB_PRESERVE_INITIAL_VALUE
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2019-02-23
Jim Lawson
Address requested changes - don't require non-$ name.
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2019-02-22
Keith Rothman
Fix WREDUCE on FF not fixing ARST_VALUE parameter.
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2019-02-22
Clifford Wolf
Merge pull request #819 from YosysHQ/clifford/optd
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2019-02-22
Clifford Wolf
Merge pull request #820 from YosysHQ/clifford/fix810
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2019-02-22
Clifford Wolf
Merge pull request #740 from daveshah1/improve_dress
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2019-02-21
Clifford Wolf
Fix Travis
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2019-02-21
Clifford Wolf
Hotfix for 4c82ddf
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2019-02-21
Clifford Wolf
Merge pull request #822 from litghost/expand_setundef
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2019-02-21
Keith Rothman
Add -params mode to force undef parameters in selected...
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2019-02-21
Clifford Wolf
Merge pull request #818 from YosysHQ/clifford/dffsrfix
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2019-02-21
Clifford Wolf
Merge pull request #786 from YosysHQ/pmgen
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2019-02-21
Clifford Wolf
Fix typo in passes/pmgen/README.md
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2019-02-21
Clifford Wolf
Merge pull request #821 from eddiehung/dff_init
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2019-02-21
Clifford Wolf
Fixes related to handling of autowires and upto-ranges...
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2019-02-21
Eddie Hung
Revert "Add -B option to autotest.sh to append to backe...
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2019-02-21
Clifford Wolf
Fix handling of expression width in $past, fixes #810
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2019-02-21
Clifford Wolf
Fix segfault in printing of some internal error messages
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2019-02-21
Clifford Wolf
Rename "yosys -U" to "yosys -P" to avoid confusion...
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2019-02-21
Clifford Wolf
Rename "yosys -D" to "yosys -U", add "yosys -D" with...
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2019-02-21
Clifford Wolf
Fix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_...
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2019-02-21
Clifford Wolf
Bugfix in ice40_dsp
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2019-02-21
Eddie Hung
Merge pull request #817 from eddiehung/dff_init
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2019-02-20
Eddie Hung
Remove simple_defparam tests
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2019-02-20
Clifford Wolf
Add ice40 test_dsp_map test case generator
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2019-02-20
Clifford Wolf
Add "synth_ice40 -dsp"
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2019-02-20
Clifford Wolf
Add FF support to wreduce
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2019-02-20
Clifford Wolf
Improve iCE40 SB_MAC16 model
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2019-02-20
Clifford Wolf
Detect and reject cases that do not map well to iCE40...
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2019-02-19
Jim Lawson
Fix normal (non-array) hierarchy -auto-top.
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2019-02-19
Eddie Hung
Merge pull request #805 from eddiehung/dff_init
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2019-02-19
Clifford Wolf
Add first draft of functional SB_MAC16 model
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2019-02-17
Eddie Hung
Instead of INIT param on cells, use initial statement...
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2019-02-17
Eddie Hung
Revert "Add INIT parameter to all ff/latch cells"
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2019-02-17
Eddie Hung
Merge https://github.com/YosysHQ/yosys into dff_init
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2019-02-17
Clifford Wolf
Add actual DSP inference to ice40_dsp pass
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2019-02-17
Clifford Wolf
Merge branch 'master' of github.com:YosysHQ/yosys into...
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2019-02-17
Clifford Wolf
Merge pull request #811 from ucb-bar/firrtlfixes
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2019-02-15
Jim Lawson
Removed unused variables, functions.
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2019-02-15
Jim Lawson
Append (instead of over-writing) EXTRA_FLAGS
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2019-02-15
Jim Lawson
Define basic_cell_type() function and use it to derive...
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2019-02-15
Jim Lawson
Update cells supported for verilog to FIRRTL conversion.
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2019-02-13
Clifford Wolf
Fix sign handling of real constants
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2019-02-12
Clifford Wolf
Merge pull request #802 from whitequark/write_verilog_a...
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2019-02-12
Clifford Wolf
Merge pull request #806 from daveshah1/fsm_opt_no_reset
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2019-02-07
David Shah
fsm_opt: Fix runtime error for FSMs without a reset...
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2019-02-06
Eddie Hung
Cope WIDTH of ff/latch cells is default of zero
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2019-02-06
Eddie Hung
Remove check for cell->name[0] == '$'
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2019-02-06
Eddie Hung
Refactor
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2019-02-06
Eddie Hung
write_verilog to cope with init attr on q when -noexpr
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2019-02-06
Eddie Hung
Add INIT parameter to all ff/latch cells
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2019-02-06
Eddie Hung
Add tests for simple cases using defparam
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2019-02-06
Eddie Hung
Add -B option to autotest.sh to append to backend_opts
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2019-02-06
Eddie Hung
Extend testcase
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2019-02-06
David Shah
ecp5: Use abc -dress
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2019-02-06
David Shah
abc: Improved recovered netnames, also preserve src...
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2019-02-06
David Shah
ice40: Use abc -dress in synth_ice40
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2019-02-06
David Shah
abc: Preserve naming through ABC using 'dress' command
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2019-02-06
Eddie Hung
Add testcase
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2019-02-06
Clifford Wolf
Add missing blackslash-to-slash convertion to smtio...
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2019-01-29
whitequark
write_verilog: correctly emit asynchronous transparent...
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2019-01-27
Clifford Wolf
Merge pull request #798 from mmicko/master
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2019-01-27
Clifford Wolf
Merge pull request #800 from whitequark/write_verilog_t...
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2019-01-27
Clifford Wolf
Merge branch 'whitequark-write_verilog_keyword'
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2019-01-27
Clifford Wolf
Remove asicworld tests for (unsupported) switch-level...
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2019-01-27
whitequark
write_verilog: write $tribuf cell as ternary.
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2019-01-27
whitequark
write_verilog: escape names that match SystemVerilog...
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2019-01-25
David Shah
Merge pull request #796 from whitequark/proc_clean_typo
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2019-01-25
Miodrag Milanovic
Fixed Anlogic simulation model
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2019-01-23
whitequark
proc_clean: fix critical typo.
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2019-01-19
Clifford Wolf
Merge pull request #793 from whitequark/proc_clean_fix_...
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2019-01-18
whitequark
proc_clean: fix fully def check to consider compare...
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2019-01-17
Clifford Wolf
Cleanups in igloo2 example design
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2019-01-17
Clifford Wolf
Add SF2 IO buffer insertion
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2019-01-17
Clifford Wolf
Improve Igloo2 example
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2019-01-17
Clifford Wolf
Add "synth_sf2 -vlog", fix "synth_sf2 -edif"
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2019-01-17
Clifford Wolf
Add "write_edif -gndvccy"
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2019-01-15
Clifford Wolf
Progress in pmgen
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2019-01-15
Clifford Wolf
Progress in pmgen, add pmgen README
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2019-01-15
Clifford Wolf
Fix pmgen "reject" statement
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2019-01-15
Clifford Wolf
Progress in pmgen
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2019-01-15
Clifford Wolf
Progress in pmgen
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2019-01-15
Clifford Wolf
Progress in pmgen
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2019-01-15
Clifford Wolf
Add mockup .pmg (pattern matcher generator) file
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2019-01-15
Clifford Wolf
Add optional nullstr argument to log_id()
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2019-01-15
Clifford Wolf
Fix handling of $shiftx in Verilog back-end
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2019-01-15
Clifford Wolf
Merge pull request #788 from whitequark/master
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2019-01-15
Clifford Wolf
Merge pull request #787 from whitequark/flowmap_relax
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2019-01-14
whitequark
manual: document some gates.
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2019-01-14
whitequark
manual: explain $tribuf cell.
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2019-01-08
Clifford Wolf
Improve igloo2 example
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2019-01-08
whitequark
flowmap: clean up terminology.
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2019-01-08
whitequark
flowmap: implement depth relaxation.
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2019-01-07
Clifford Wolf
Fix typo in manual
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