litex.git
2015-09-20 Sebastien Bourdeauducqfhdl/visit: support Constant
2015-09-20 Sebastien Bourdeauducqtravis: VPI is not there for now
2015-09-20 Sebastien Bourdeauducqsim: support generators yielding statements
2015-09-20 Sebastien Bourdeauducqsim: memory access from generators
2015-09-20 Sebastien Bourdeauducqfhdl/structure: add missing init
2015-09-19 Sebastien Bourdeauducqsim: memory support
2015-09-19 Sebastien Bourdeauducqfhdl/specials: MemoryPort.clock should always be a...
2015-09-19 Sebastien Bourdeauducqfhdl/simplify: add MemoryToArray
2015-09-19 Sebastien Bourdeauducqtest/fifo: convert to new API
2015-09-19 Sebastien Bourdeauducqgenlib/fifo: add missing import
2015-09-19 Sebastien Bourdeauducqsim: support arrays, and cat+slice in assignment target
2015-09-19 Florent Kermarrecmigen/genlib/cdc: fix BusSynchronizer
2015-09-19 Sebastien Bourdeauducqsim: remove unneeded import
2015-09-19 Sebastien Bourdeauducqgenlib/CRG: fix variable name conflict
2015-09-18 Sebastien Bourdeauducqtest: add divider
2015-09-17 Sebastien Bourdeauducqsim: support Case
2015-09-17 Sebastien Bourdeauducqsim: variables are deprecated
2015-09-17 Sebastien Bourdeauducqsim: fix comb evaluation
2015-09-17 Sebastien Bourdeauducqtest/size: do not test removed functions
2015-09-17 Sebastien Bourdeauducqtest/coding: use new API
2015-09-17 Sebastien Bourdeauducqgenlib/misc: add missing import
2015-09-17 Sebastien Bourdeauducqfhdl/structure: all case statements should be lists
2015-09-17 Sebastien Bourdeauducqfhdl/bitcontainer: remove fiter
2015-09-17 Sebastien Bourdeauducqminor bugfixes
2015-09-17 Sebastien Bourdeauducqsim: support eval of slice, cat and mux
2015-09-17 Sebastien Bourdeauducqfhdl/structure: fix namespace pollution
2015-09-17 Sebastien Bourdeauducqtest: bit reverse
2015-09-17 Sebastien Bourdeauducqfhdl/bitcontainer: remove fslice and freversed
2015-09-17 Sebastien Bourdeauducqtest/constant: use new API
2015-09-17 Robert Jordensadd unittests for Constant
2015-09-17 Sebastien Bourdeauducqdoc: Constant
2015-09-17 Sebastien Bourdeauducqfhdl/verilog: fix case value sort
2015-09-15 Sebastien Bourdeauducqfhdl/structure: introduce Constant, autowrap for eq...
2015-09-12 Sebastien Bourdeauducqfhdl/decorators: remove traces of deprecated API
2015-09-12 Sebastien Bourdeauducqgenlib: remove reverse_bytes, FlipFlop, Counter
2015-09-12 Sebastien Bourdeauducqgenlib: cleanup CRG
2015-09-12 Sebastien Bourdeauducqfhdl/decorators: remove deprecated API
2015-09-12 Sebastien Bourdeauducqsimplify imports, migen.fhdl.std -> migen
2015-09-12 Sebastien Bourdeauducqbuild/xilinx: minor cleanup
2015-09-12 Sebastien Bourdeauducqtest/support,signed,sort: use new simulator
2015-09-12 Sebastien Bourdeauducqsim: refactor comb commit
2015-09-12 Sebastien Bourdeauducqsim: support eval of nested lists
2015-09-12 Sebastien Bourdeauducqgenlib/sort: remove unneeded import
2015-09-12 Sebastien Bourdeauducqexamples/graycounter: use new simulator
2015-09-12 Sebastien Bourdeauducqtest/examples: do not attempt to run deleted examples
2015-09-12 Sebastien Bourdeauducqsim: support clock domains without sync
2015-09-11 Sebastien Bourdeauducqsimulator: support generators
2015-09-11 Sebastien Bourdeauducqnew simulator: basic execution
2015-09-11 Sebastien Bourdeauducqfhdl/tools: add input lister
2015-09-11 Sebastien Bourdeauducqstyle
2015-09-11 Sebastien Bourdeauducqfhdl: remove features new simulator won't use
2015-09-10 Sebastien Bourdeauducqremove genlib.misc.optree (use reduce instead)
2015-09-10 Yves Delleyfixed bug in value_bits_sign of mul operatiors
2015-09-10 Sebastien Bourdeauducqmibuild -> migen.build
2015-09-05 Sebastien BourdeauducqSimulator will be rewritten
2015-09-05 Sebastien BourdeauducqRemove code that will be into MiSoC or other packages.
2015-08-18 Florent Kermarrecmigen/actorlib/packet: fix source.error in Depacketizer
2015-08-18 Florent Kermarrecmibuild/xilinx/ise: update synthesis with yosis
2015-08-09 Florent Kermarrecmigen/flow/actor: fix sop/eop validation in PipelinedAc...
2015-08-04 Ryan VernerPort fpgalink_programmer to use newer fl library.
2015-07-31 Sebastien Bourdeauducqtry to use the new anaconda-client
2015-07-29 Sebastien Bourdeauducqise: do not use LCK_cycle:6 by default
2015-07-28 Robert Jordenspipistrello: fix cts/rts
2015-07-27 Sebastien Bourdeauducqplatforms/kc705: add GPIO SMA
2015-07-27 Sebastien Bourdeauducqresetless -> reset_less
2015-07-26 Sebastien Bourdeauducqfhdl: allow use of ResetSignal() on resetless clock...
2015-07-24 Sebastien BourdeauducqRevert "migen/actorlib/fifo: add FIFO wrapper function"
2015-07-24 Florent Kermarrecmigen/actorlib/fifo: add FIFO wrapper function
2015-07-24 Florent Kermarrecmigen/fhdl/tools: fix rename_clock_domain when new...
2015-07-22 Florent KermarrecMerge branch 'master' of https://github.com/m-labs...
2015-07-22 Florent Kermarrecactorlib/packet/Depacketizer: manage layouts without...
2015-07-14 numatoRemoved drive strength constraints on VGA/Audio signals
2015-07-14 Robert Jordensxilinx: ensure we chdir() back after build
2015-07-14 Sebastien Bourdeauducqmimasv2: style, consistency with other boards
2015-07-14 numatoAdding support for Numato Lab Mimas V2 platform
2015-07-14 Sebastien Bourdeauducqplatforms/kc705: style
2015-07-08 Robert Jordensmibuild/openocd.py: add support
2015-07-05 Sebastien BourdeauducqMerge branch 'master' of https://github.com/m-labs...
2015-07-05 Tim 'mithro... Allow using non-milkymist cables with UrJTAG.
2015-07-02 Tim 'mithro... mibuild: Adding error checking around xsvf generation
2015-07-02 Tim 'mithro... Adding support for programming with FPGALink
2015-07-02 Tim 'mithro... mibuild/xilinx: Adding programming with the Digilent...
2015-07-02 Florent Kermarrecmibuild/xilinx: Xilinx's FPGAs do not necessary share...
2015-06-29 Yann Sionneautravis: use use-local for conda install
2015-06-28 William D.... Remove self.programmer references in Mercury, as mercur...
2015-06-28 William D.... Add Mercury dev board to mibuild (micro-nova.com/mercury/)
2015-06-24 Sébastien BourdeauducqMerge pull request #21 from psmears/patch-1
2015-06-23 Florent Kermarrecfhdl/specials: add Keep SynthesisDirective
2015-06-19 Florent Kermarrecbus/wishbone: remove size CSR from Cache (L2 size will...
2015-06-18 Florent Kermarrecmibuild/xilinx/ise: fix source and set source to False...
2015-06-18 Florent Kermarrecmibuild/xilinx/ise: simplify default_ise_path
2015-06-18 William D.... Xilinx Platforms now use cmd.exe on Windows instead...
2015-06-18 psmearsMinor improvements to wording
2015-06-17 Florent Kermarrecwishbone: add Cache (from WB2LASMI)
2015-06-14 Yann Sionneaupipistrello: fix FPGA speed grade
2015-06-02 Florent Kermarrecmigen/bus/wishbone: add UpConverter and Converter wrapp...
2015-06-02 Florent Kermarrecmigen/genlib/fsm: fix delayed_enter when delay is negat...
2015-06-02 Sebastien Bourdeauducqgenlib/cdc: add BusSynchronizer
2015-05-28 Sebastien Bourdeauducqsetup.py: valid version number (fixes issue #12)
2015-05-23 Florent Kermarrecfhdl/verilog: add reserved keywords
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