yosys.git
2019-06-10 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-06-10 Eddie HungAdd some more comments
2019-06-10 David ShahMerge pull request #1082 from corecode/u4k
2019-06-10 Simon Schubertice40/cells_sim.v: Add support for RGB_DRV/LED_DRV_CUR...
2019-06-08 Clifford WolfMerge pull request #1078 from YosysHQ/eddie/muxcover_costs
2019-06-07 Eddie HungMerge branch 'master' into eddie/muxpack
2019-06-07 Eddie HungFix spacing from spaces to tabs
2019-06-07 Eddie HungComment O(N) -> O(N^2)
2019-06-07 Eddie HungAdd nonexcl case test, comment out two others
2019-06-07 Eddie HungExtend ExclusiveDatabase to query SigSpec-s (for $pmux)
2019-06-07 Eddie HungAdd ExclusiveDatabase to check exclusive $eq/$logic_not...
2019-06-07 Clifford WolfMerge pull request #1079 from YosysHQ/eddie/fix_read_aiger
2019-06-07 Eddie HungAdd read_aiger to CHANGELOG
2019-06-07 Eddie HungAdd @cliffordwolf freduce testcase
2019-06-07 Eddie HungAdd nonexclusive test from @cliffordwolf
2019-06-07 Eddie HungResolve @cliffordwolf comment on redundant check
2019-06-07 Eddie HungResolve @cliffordwolf comment on sigmap
2019-06-07 Eddie HungFix spacing (entire file is wrong anyway, will fix...
2019-06-07 Eddie HungRemove unnecessary std::getline() for ASCII
2019-06-07 Eddie HungTest *.aag too, by using *.aig as reference
2019-06-07 Eddie HungFix read_aiger -- create zero driver, fix init width...
2019-06-07 Eddie HungUse ABC to convert from AIGER to Verilog
2019-06-07 Eddie HungUse ABC to convert AIGER to Verilog, then sat against...
2019-06-07 Eddie HungAdd symbols to AIGER test inputs for ABC
2019-06-07 Eddie HungAnother muxpack test
2019-06-07 Eddie HungAllow muxcover costs to be changed
2019-06-07 Clifford WolfMerge pull request #1077 from YosysHQ/clifford/pr983
2019-06-07 Clifford WolfRename implicit_ports.sv test to implicit_ports.v
2019-06-07 Clifford WolfFixes and cleanups in AST_TECALL handling
2019-06-07 Clifford WolfMerge branch 'pr_elab_sys_tasks' of https://github...
2019-06-07 Clifford WolfMerge branch 'tux3-implicit_named_connection'
2019-06-07 Clifford WolfMerge pull request #1076 from thasti/centos7-build-fix
2019-06-07 Clifford WolfCleanup tux3-implicit_named_connection
2019-06-07 Clifford WolfMerge branch 'implicit_named_connection' of https:...
2019-06-07 Stefan Biereigelremove boost/log/exceptions.hpp from wrapper generator
2019-06-06 Eddie HungFix and test for balanced case
2019-06-06 Eddie HungFix warnings
2019-06-06 Eddie HungSupport cascading $pmux.A with $mux.A and $mux.B
2019-06-06 Eddie HungMore cleanup
2019-06-06 Eddie HungFix spacing
2019-06-06 Eddie HungNon chain user check using next_sig
2019-06-06 Eddie HungAdd non exclusive test
2019-06-06 Eddie HungMove muxpack from passes/techmap to passes/opt
2019-06-06 Eddie HungUpdate doc
2019-06-06 Eddie HungAdd to CHANGELOG
2019-06-06 Eddie HungOne more and tidy up
2019-06-06 Eddie HungAdd a few more special case tests
2019-06-06 Eddie HungAdd tests, fix for !=
2019-06-06 Eddie HungMissing file
2019-06-06 Eddie HungInitial adaptation of muxpack from shregmap
2019-06-06 tux3SystemVerilog support for implicit named port connections
2019-06-06 Clifford WolfMerge pull request #1060 from antmicro/parsing_attr_on_...
2019-06-06 David ShahMerge pull request #1073 from whitequark/ecp5-diamond-iob
2019-06-06 whitequarkECP5: implement all Diamond I/O buffer primitives.
2019-06-06 Clifford WolfMerge pull request #1071 from YosysHQ/eddie/fix_1070
2019-06-06 Clifford WolfMerge pull request #1072 from YosysHQ/eddie/fix_1069
2019-06-05 Eddie HungMissing doc for -tech xilinx in shregmap
2019-06-05 Eddie HungError out if no top module given before 'sim'
2019-06-05 Eddie HungFix typo in opt_rmdff
2019-06-05 Eddie HungMerge pull request #1067 from YosysHQ/clifford/fix1065
2019-06-05 Maciej KurcFixed memory leak.
2019-06-05 Clifford WolfMerge pull request #1066 from YosysHQ/clifford/fix1056
2019-06-05 Clifford WolfMajor rewrite of wire selection in setundef -init
2019-06-05 Clifford WolfIndent fix
2019-06-05 Clifford WolfMerge pull request #999 from jakobwenzel/setundefInitFix
2019-06-05 Clifford WolfFix typo in fmcombine log message, fixes #1063
2019-06-05 Clifford WolfSuppress driver-driver conflict warning for unknown...
2019-06-05 Clifford WolfRemove yosys_banner() from python wrapper init, fixes...
2019-06-04 Clifford WolfMerge pull request #1062 from tux3/patch-1
2019-06-04 Tux3README.md: Missing formatting for <tag>
2019-06-04 Maciej KurcMoved tests that fail with Icarus Verilog to /tests...
2019-06-04 Eddie HungMerge pull request #1061 from YosysHQ/eddie/techmap_and...
2019-06-04 Eddie HungRemove extra newline
2019-06-04 Eddie HungExecute techmap and arith_map simultaneously
2019-06-03 Maciej KurcAdded tests for attributes
2019-06-02 Clifford WolfOnly support Symbiotic EDA flavored Verific
2019-05-31 Maciej KurcAdded support for parsing attributes on port connections.
2019-05-31 Clifford WolfFix "tee" handling of log_streams
2019-05-30 Clifford WolfEnable Verific flag veri_elaborate_top_level_modules_ha...
2019-05-30 Clifford WolfMerge pull request #1057 from mmicko/fix_478
2019-05-29 Miodrag MilanovicAded one more load of .conf to support change of prefix
2019-05-28 Clifford WolfMerge pull request #1049 from YosysHQ/clifford/fix1047
2019-05-28 Clifford WolfMerge pull request #1050 from YosysHQ/clifford/wandwor
2019-05-28 Clifford WolfDo not use shiftmul peepopt pattern when mul result...
2019-05-28 Clifford WolfMerge pull request #1048 from mmicko/fix_enable_pyosys
2019-05-28 Clifford WolfRefactor hierarchy wand/wor handling
2019-05-28 Clifford WolfAdd actual wandwor test that is part of "make test"
2019-05-28 Clifford WolfMerge branch 'wandwor' of https://github.com/thasti...
2019-05-28 Miodrag MilanovicRemove info line in 2nd load of conf file
2019-05-28 Miodrag MilanovicMoved pyosys block in Makefile
2019-05-28 Clifford WolfMerge pull request #1045 from mmicko/afl-gcc-target
2019-05-27 Miodrag Milanovicmake config-afl-gcc to help creating conf file
2019-05-27 Miodrag MilanovicAdded afl-gcc as target for fuzzer
2019-05-27 Stefan BiereigelMerge branch 'master' into wandwor
2019-05-27 Stefan Biereigelreformat wand/wor test
2019-05-27 Stefan Biereigelremove port direction workaround from test case
2019-05-27 Stefan Biereigelupdate README.md with wand/wor information
2019-05-27 Stefan Biereigelremove leftovers from ast data structures
2019-05-27 Stefan Biereigelmove wand/wor resolution into hierarchy pass
2019-05-27 Clifford WolfMerge pull request #1044 from mmicko/invalid_width_range
next