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yosys.git
2019-10-24
Pepijn de Vos
ALU sim tweaks
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2019-10-24
Clifford Wolf
Improve naming scheme for (VHDL) modules imported from...
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2019-10-24
David Shah
Merge pull request #1455 from YosysHQ/dave/ultrascaleplus
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2019-10-24
Clifford Wolf
Add "verific -L"
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2019-10-23
David Shah
ice40: Add post-pnr ICESTORM_RAM model and fix FFs
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2019-10-23
David Shah
ice40: Support for post-pnr timing simulation
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2019-10-23
David Shah
xilinx: Add URAM288 mapping for xcup
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2019-10-23
David Shah
xilinx: Add support for UltraScale[+] BRAM mapping
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2019-10-22
Clifford Wolf
Bugfix in smtio vcd handling of $-identifiers
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2019-10-22
Marcin Kościelnicki
xilinx: Support multiplier mapping for all families.
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2019-10-22
Clifford Wolf
Merge pull request #1452 from nakengelhardt/fix_dsp_mem_reg
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2019-10-21
Pepijn de Vos
Add some tests
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2019-10-21
Pepijn de Vos
add a few more missing dff
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2019-10-21
Clifford Wolf
Add "verilog_defines -list" and "verilog_defines -reset"
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2019-10-21
Clifford Wolf
Fix handling of "restrict" in Verific front-end
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2019-10-21
Pepijn de Vos
add negedge DFF
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2019-10-21
Pepijn de Vos
use ADDSUB ALU mode to remove inverters
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2019-10-21
Pepijn de Vos
Merge branch 'master' of https://github.com/YosysHQ...
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2019-10-20
David Shah
ecp5: Pass -nomfs to abc9
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2019-10-19
Miodrag Milanović
Merge pull request #1457 from xobs/python-binary-name
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2019-10-19
Sean Cross
Makefile: don't assume python is called `python3`
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2019-10-18
Miodrag Milanović
Merge pull request #1454 from YosysHQ/mmicko/common_tests
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2019-10-18
Miodrag Milanovic
fixed error
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2019-10-18
Miodrag Milanovic
Unify verilog style
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2019-10-18
Miodrag Milanovic
Common memory test now shared
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2019-10-18
Miodrag Milanovic
Remove not needed tests
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2019-10-18
Miodrag Milanovic
Share common tests
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2019-10-18
Miodrag Milanovic
fix yosys path
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2019-10-18
Miodrag Milanovic
Fix path to yosys
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2019-10-18
Miodrag Milanovic
Moved all tests in arch sub directory
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2019-10-18
Miodrag Milanovic
Add async2sync
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2019-10-18
Miodrag Milanović
Merge pull request #1435 from YosysHQ/mmicko/efinix
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2019-10-18
Miodrag Milanović
Merge branch 'master' into mmicko/efinix
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2019-10-18
Miodrag Milanović
Merge pull request #1434 from YosysHQ/mmicko/anlogic
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2019-10-18
Miodrag Milanović
Merge branch 'master' into mmicko/anlogic
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2019-10-18
Miodrag Milanović
Merge pull request #1421 from YosysHQ/eddie/pr1352
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2019-10-18
Miodrag Milanović
Merge branch 'master' into eddie/pr1352
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2019-10-18
Miodrag Milanović
Merge pull request #1420 from YosysHQ/eddie/pr1363
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2019-10-18
Miodrag Milanovic
hierarchy - proc reorder
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2019-10-18
Miodrag Milanovic
hierarchy - proc reorder
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2019-10-18
Miodrag Milanovic
hierarchy - proc reorder
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2019-10-18
Miodrag Milanovic
hierarchy - proc reorder
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2019-10-17
N. Engelhardt
Call memory_dff before DSP mapping to reserve registers...
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2019-10-17
Miodrag Milanovic
Make equivalence work with latest master
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2019-10-17
Miodrag Milanovic
remove not needed top module
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2019-10-17
Miodrag Milanovic
remove not needed top module
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2019-10-17
Miodrag Milanovic
split muxes synth per type
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2019-10-17
Miodrag Milanovic
Test dffs separetely
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2019-10-17
Miodrag Milanovic
Split latches into separete tests
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2019-10-17
Miodrag Milanovic
Fix formatting
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2019-10-17
Miodrag Milanovic
Clean verilog code from not used define block
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2019-10-17
Miodrag Milanovic
Removed alu and div_mod test as agreed, ignore generate...
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2019-10-17
Miodrag Milanovic
Test per flip-flop type
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2019-10-17
Eddie Hung
Add -assert
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2019-10-17
Eddie Hung
Use built-in async2sync call as per #1417
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2019-10-17
Eddie Hung
Update mul test to DSP48E1
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2019-10-17
Eddie Hung
Update area for div_mod
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2019-10-17
Eddie Hung
Add comment for lack of tristate logic pointing to...
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2019-10-17
Eddie Hung
Move $x to end as 7f0eec8
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2019-10-17
SergeyDegtyar
adffs test update (equiv_opt -multiclock)
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2019-10-17
Sergey
Fix div_mod test
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2019-10-17
Sergey
Fix div_mod test
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2019-10-17
Sergey
Fix div_mod test
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2019-10-17
Sergey
Fix div_mod test
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2019-10-17
Sergey
Fix div_mod test
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2019-10-17
Sergey
Fix div_mod test
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2019-10-17
SergeyDegtyar
Add comment with expected behavior for latches,tribuf...
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2019-10-17
SergeyDegtyar
Fix latches.ys test
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2019-10-17
SergeyDegtyar
Remove xilinx_ug901 tests (will be moved to yosys-tests)
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2019-10-17
SergeyDegtyar
Add smoke tests to tests/xilinx
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2019-10-17
SergeyDegtyar
Add comments for unproven cells.
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2019-10-17
SergeyDegtyar
Add tests for Xilinx UG901 examples
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2019-10-16
Clifford Wolf
Merge pull request #1450 from YosysHQ/clifford/fixdffmux
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2019-10-16
Clifford Wolf
Fix dffmux peepopt init handling
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2019-10-16
Clifford Wolf
Move GENERATE_PATTERN macro to separate utility header
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2019-10-16
Pepijn de Vos
remove duplicate DFFR
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2019-10-16
Clifford Wolf
Disable left-over log_debug in peepopt_dffmux.pmg
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2019-10-16
Clifford Wolf
Fix parsing of .cname BLIF statements
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2019-10-15
Clifford Wolf
Add .blackbox support to blif front-end
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2019-10-15
Benedikt Tutzer
Merge branch 'master' of https://github.com/YosysHQ...
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2019-10-14
Clifford Wolf
Merge pull request #1448 from YosysHQ/daveshah1-sv...
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2019-10-14
David Shah
Merge pull request #1446 from YosysHQ/dave/ecp5-ioff
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2019-10-14
Clifford Wolf
Use "(id)" instead of "id" for types as temporary hack
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2019-10-11
David Shah
ecp5: Add ECLKBRIDGECS blackbox
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2019-10-10
David Shah
ecp5: Add attrmvcp to copy syn_useioff to driving FF
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2019-10-10
David Shah
ecp5: Set syn_useioff on IO FFs to enable packing
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2019-10-10
Miodrag Milanović
Merge pull request #1445 from YosysHQ/mwk/xilinx_ibufg
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2019-10-10
Marcin Kościelnicki
xilinx: Add simulation model for IBUFG.
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2019-10-09
Benedikt Tutzer
Fix renaming all classes to Cpp*
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2019-10-09
Benedikt Tutzer
Expose global variables and allow logging to python...
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2019-10-08
Eddie Hung
Revert "Add test that is expecting to fail"
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2019-10-08
Eddie Hung
Revert "Be mindful that sigmap(wire) could have dupes...
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2019-10-08
Eddie Hung
Merge pull request #1432 from YosysHQ/eddie/fix1427
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2019-10-08
Eddie Hung
Merge pull request #1433 from YosysHQ/eddie/equiv_opt_a...
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2019-10-08
Eddie Hung
Merge pull request #1437 from YosysHQ/eddie/abc_to_abc9
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2019-10-08
Eddie Hung
Merge pull request #1438 from YosysHQ/eddie/xilinx_dsp_...
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2019-10-06
Clifford Wolf
Merge pull request #1439 from YosysHQ/eddie/fix_ice40_w...
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2019-10-05
Eddie Hung
Missing 'accept' at end of ice40_wrapcarry, spotted...
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2019-10-05
Clifford Wolf
Update README.md
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2019-10-05
Eddie Hung
Missed this
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