litex.git
2013-06-11 Sebastien Bourdeauducqbus/lasmibus/Crossbar: support cba_shift=0
2013-06-10 Sebastien Bourdeauducqlasmi: fix minor problems
2013-06-10 Sebastien Bourdeauducqgenlib/fsm: fix handling of zero delayed_enter
2013-06-10 Sebastien Bourdeauducqactorlib: LASMI DMA (untested)
2013-06-10 Sebastien Bourdeauducqbus: Wishbone -> LASMI bridge (untested)
2013-06-09 Sebastien Bourdeauducqexamples/sim: add LASMI demo
2013-06-09 Sebastien Bourdeauducqbus/lasmibus: bugfixes
2013-06-09 Sebastien Bourdeauducqbus/lasmibus: add target and initiator
2013-06-09 Sebastien Bourdeauducqexamples/sim: rename abstract_transactions to abstract_...
2013-06-08 Sebastien Bourdeauducqbus/lasmi: interface definition and crossbar (untested)
2013-06-03 Kenneth Ryersoncsr/sram: fix reads on high addresses when word_bits...
2013-06-03 Kenneth Ryersoncsr/sram: fix page_bits computation
2013-05-30 Sebastien Bourdeauducqgenlib/misc: fix import
2013-05-30 Sebastien Bourdeauducqbus/csr/SRAM: better handling of writes to memories...
2013-05-30 Sebastien Bourdeauducqbitreverse: fhdl/tools -> genlib/misc
2013-05-28 Sebastien BourdeauducqMake memory ports part of specials
2013-05-22 Sebastien BourdeauducqNew migen.fhdl.std to simplify imports + len->flen
2013-05-19 Sebastien Bourdeauducqbus/wishbone/SRAM: support init and read_only
2013-05-19 Sebastien Bourdeauducqbus/csr/SRAM: support init
2013-05-16 Sebastien Bourdeauducqsetup.py: update required Python version
2013-05-12 Sebastien Bourdeauducqbus/asmi: port sharing support
2013-05-11 Sebastien Bourdeauducqfhdl/tools/_TargetLister: do not include array keys...
2013-05-11 Sebastien Bourdeauducqgenlib/record: match_by_position -> connect_flat
2013-05-10 Sebastien BourdeauducqRevert "genlib/record/connect: add match_by_position"
2013-05-08 Sebastien Bourdeauducqbank/description/AutoCSR: add autocsr_exclude
2013-05-08 Sebastien Bourdeauducqdma_asmi: cleanup
2013-05-08 Sebastien Bourdeauducqbank/eventmanager: refactor, rename EventSourceLevel...
2013-05-04 Sebastien Bourdeauducqactorlib/spi: add DMAWriteController
2013-05-04 Sebastien Bourdeauducqactorlib/dma_asmi/OOOWriter: fix tag offset
2013-05-02 Sebastien Bourdeauducqflow/network/DataFlowGraph: add_buffered_connection
2013-05-02 Sebastien Bourdeauducqbank/description/CSRStorage: set reset property of...
2013-05-01 Sebastien Bourdeauducqflow/network: better determination of plumbing layout
2013-05-01 Sebastien Bourdeauducqactorlib/dma_asmi: drive dat_wm
2013-04-30 Sebastien Bourdeauducqactorlib/spi: add DMA read controller
2013-04-30 Sebastien Bourdeauducqactorlib/spi/SingleGenerator: use CSR alignment bits
2013-04-30 Sebastien Bourdeauducqbank/description/CSRStorage: support alignment bits
2013-04-30 Sebastien Bourdeauducqflow/network/CompositeActor: expose unconnected endpoints
2013-04-30 Sebastien Bourdeauducqflow/network/DataFlowGraph: add add_pipeline
2013-04-28 Sebastien Bourdeauducqactorlib/spi/Collector: cleanup, new APIs
2013-04-28 Sebastien Bourdeauducqactorlib/dma_asmi: support for writes
2013-04-25 Sebastien Bourdeauducqgenlib/fifo: disable retiming on Gray counter outputs
2013-04-25 Sebastien Bourdeauducqgenlib/cdc: add NoRetiming
2013-04-25 Sebastien Bourdeauducqfhdl/verilog: recursive Special lowering
2013-04-25 Sebastien Bourdeauducqgenlib/fifo: add asynchronous FIFO
2013-04-25 Sebastien Bourdeauducqfhdl/specials/memory: do not write address register...
2013-04-25 Sebastien Bourdeauducqgraycounter: expose binary output
2013-04-24 Sebastien Bourdeauducqgenlib: add Gray counter
2013-04-23 Florent KermarrecSupport for resetless clock domains
2013-04-15 Sebastien BourdeauducqChange license to 2-clause BSD
2013-04-14 Sebastien Bourdeauducqbus/csr/SRAM: fix Module conversion errors
2013-04-14 Sebastien Bourdeauducqfhdl: support len() on all values
2013-04-11 Sebastien Bourdeauducqfhdl/verilog/_printinit: initialize undriven Special...
2013-04-10 Sebastien Bourdeauducqioo+pytholite: use new Module API
2013-04-10 Sebastien Bourdeauducqfhdl/visit: add TransformModule
2013-04-10 Sebastien Bourdeauducqioo: move to genlib
2013-04-10 Sebastien Bourdeauducquio: remove Trampoline (Python 3.3 provides generator...
2013-04-10 Sebastien Bourdeauducqflow: match record fields by position
2013-04-10 Sebastien Bourdeauducqgenlib/record/connect: add match_by_position
2013-04-10 Sebastien Bourdeauducqflow: use Module and new Record APIs
2013-04-01 Sebastien Bourdeauducqflow: adapt to new Record API
2013-04-01 Sebastien Bourdeauducqbus: replace simple bus module with new bidirectional...
2013-04-01 Sebastien BourdeauducqNew bidirectional-capable Record API
2013-03-30 Sebastien BourdeauducqNew CSR API
2013-03-30 Sebastien Bourdeauducqfhdl/module/finalize: pass additional args to do_finalize
2013-03-26 Sebastien Bourdeauducqfhdl/specials: clean up clock domain handling
2013-03-25 Sebastien Bourdeauducqactorlib/structuring/Cast: support inversion
2013-03-25 Sebastien Bourdeauducqbank/csrgen/BankArray: retain name information
2013-03-25 Sebastien Bourdeauducqbank/description/Register: add get_size
2013-03-23 Sebastien Bourdeauducqgenlib/record: use getattr instead of __dict__
2013-03-23 Sebastien Bourdeauducqgenlib/record: add eq
2013-03-22 Sebastien Bourdeauducqgenlib/fifo: simple synchronous FIFO
2013-03-22 Sebastien Bourdeauducqfhdl/module: support clock domain remapping of submodules
2013-03-21 Sebastien Bourdeauducqgenlib/cdc/MultiReg: output clock domain defaults to sys
2013-03-19 Sebastien Bourdeauducqexamples/sim/fir: convert to new API
2013-03-18 Sebastien Bourdeauducqfhdl/verilog: optionally disable clock domain creation
2013-03-18 Sebastien Bourdeauducqexamples/basic/arrays: demonstrate lowering of Array...
2013-03-18 Sebastien BourdeauducqLowering of Special expressions + support ClockSignal...
2013-03-18 Sebastien Bourdeauducqfhdl/tools/_ArrayLowerer: complete support for arrays...
2013-03-18 Sebastien Bourdeauducqfhdl/tools/value_bits_sign: support not
2013-03-17 Sebastien Bourdeauducqfhdl/structure: style fix
2013-03-17 Sébastien BourdeauducqMerge pull request #6 from larsclausen/master
2013-03-15 Sebastien Bourdeauducqgenlib/cdc/MultiReg: implement rename_clock_domain...
2013-03-15 Sebastien Bourdeauducqgenlib/cdc/MultiReg: remove idomain
2013-03-15 Sebastien Bourdeauducqfhdl/specials: fix rename_clock_domain declarations
2013-03-15 Sebastien Bourdeauducqsim: remove PureSimulable (superseded by Module)
2013-03-15 Sebastien Bourdeauducqstructure: remove Fragment.call_sim
2013-03-15 Sebastien Bourdeauducqsim: compatibility with new ClockDomain API
2013-03-15 Sebastien BourdeauducqLocal clock domain example
2013-03-15 Sebastien BourdeauducqMake ClockDomains part of fragments
2013-03-14 Sebastien Bourdeauducqflow/actor/filter_endpoints: deterministic order
2013-03-13 Sebastien Bourdeauducqbank/csrgen/BankArray: create banks in sorted order
2013-03-13 Sebastien Bourdeauducqbank/description: modify reg/mem in-place
2013-03-12 Lars-Peter... Allow SimActors to produce/consume a constant stream...
2013-03-12 Lars-Peter... Add support for negative slice indices
2013-03-12 Sebastien Bourdeauducqexamples/pytholite: use new APIs
2013-03-12 Sebastien Bourdeauducqsim/generic: support implicit get_fragment
2013-03-12 Sebastien Bourdeauducqvpi: make it work by default on Arch
2013-03-12 Sebastien Bourdeauducqexamples/basic: use new APIs
2013-03-12 Sebastien Bourdeauducqfhdl/verilog: implicit get_fragment
2013-03-12 Sebastien Bourdeauducqfhdl/specials/Memory: automatic name#
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