openpower-isa.git
2023-01-15 Dmitry Selyutinpower_insn: postpone operands initialization
2023-01-15 Dmitry Selyutinpower_insn: ensure operands are always dataclasses
2023-01-15 Dmitry Selyutinpower_insn: provide basics for insndb assembly
2023-01-15 Dmitry Selyutinpower_insn: return None for unknown insn names
2023-01-15 Dmitry Selyutinpower_insn: introduce signed immediate operand class
2023-01-15 Dmitry Selyutinpower_insn: rename register operand class
2023-01-15 Dmitry Selyutinpower_insn: clean and simplify EXTS operands
2023-01-15 Dmitry Selyutinpower_insn: support FPR operands assembly
2023-01-15 Dmitry Selyutinpower_insn: support GPR operands
2023-01-15 Dmitry Selyutinpower_insn: support non-zero operands
2023-01-15 Dmitry Selyutinpower_insn: allow sign only for SignedOperand
2023-01-15 Dmitry Selyutinpower_insn: add support for a trivial assembly
2023-01-15 Jacob Lifshayadd INSNDB=true test pass to .gitlab-ci.yml
2023-01-01 Luke Kenneth... correct name for Mem test function
2023-01-01 Luke Kenneth... gaah a mess (but working)
2023-01-01 Luke Kenneth... use qemu user-mode to run cross-compiled xchacha20
2023-01-01 Luke Kenneth... ascii dump on xchacha20 to compare against x86 version
2023-01-01 Luke Kenneth... add -mno-altivec option to xchacha20 test
2023-01-01 Luke Kenneth... enable misaligned Mem in ISACaller by default
2023-01-01 Cesar StraussHandle newer nMigen adding a "bench" top-level root...
2022-12-30 Luke Kenneth... corrections to boundary-wrapped store, and add misalign...
2022-12-30 Luke Kenneth... add rollover mem test, store "rolls over" a 64-bit...
2022-12-30 Luke Kenneth... add misaligned mem test
2022-12-30 Luke Kenneth... add misaligned mem test
2022-12-30 Luke Kenneth... relocate main() to a single section
2022-12-30 Luke Kenneth... add unit test for Mem class, need to add misaligned...
2022-12-29 Luke Kenneth... print out memory exception details, on unaligned
2022-12-29 Luke Kenneth... add .gitignore
2022-12-29 Luke Kenneth... add cross-compiled test of xchacha20 suitable for runni...
2022-12-29 Luke Kenneth... simplify by running smallest test
2022-12-29 Luke Kenneth... get video pypowersim_wrapper running
2022-12-29 Luke Kenneth... add bryan hawkins chacha20 source from
2022-11-11 Jacob Lifshayadd maddedus
2022-11-11 Jacob Lifshayfix case_sv_bigint_shift_left_then_back
2022-11-11 Jacob LifshayXLEN-ify maddedu
2022-11-11 Jacob Lifshayfix maddedu title line
2022-11-11 Jacob Lifshayfix bug in parser when concatenating stuff that isn...
2022-11-01 Dmitry Selyutintests/bigint: provide shadd/shadduw tests
2022-11-01 Dmitry Selyutinselectable_int: support variable concatenation
2022-11-01 Dmitry Selyutinbitmanip.mdwn: avoid overflow for m variable
2022-11-01 Dmitry SelyutinRevert "Revert "https://bugs.libre-soc.org/show_bug...
2022-11-01 Dmitry SelyutinRevert "corrections to shadd/uw after reverting to...
2022-11-01 Luke Kenneth... corrections to shadd/uw after reverting to switch
2022-11-01 Luke Kenneth... Revert "https://bugs.libre-soc.org/show_bug.cgi?id...
2022-10-29 Luke Kenneth... add dsld. (Rc=1) test, make overflow acceptable to...
2022-10-28 Jacob Lifshayadd tests for carry/overflow calculation of addmeo...
2022-10-28 Jacob Lifshayformat code
2022-10-28 Luke Kenneth... dsld: MASK(0, 63-n) works just as well as MASK(64,...
2022-10-28 Luke Kenneth... overflow condition in dsld and dsrd if RS is non-zero
2022-10-28 Luke Kenneth... fix dsrd pseudocode to use ROTL64 not ROTL128
2022-10-28 Luke Kenneth... fix dsld pseudocode to use ROTL64 instead of ROTL128
2022-10-28 Luke Kenneth... add test showing that dsld and dsrd are not quite inverses
2022-10-28 Jacob Lifshayupdate csvs to match make output
2022-10-28 Jacob Lifshayfix bigint shift tests
2022-10-28 Luke Kenneth... fix dsrd, ROTL128 use 128-n not 64-n,
2022-10-28 Luke Kenneth... redo sv_analysis for dsld/dsrd
2022-10-28 Luke Kenneth... fix dsrd pseudocode for new 3-in 2-out
2022-10-28 Luke Kenneth... sort out dsld pseudocode, creating mask is tricky
2022-10-28 Luke Kenneth... endeavouring to implement shift-carry-dsld
2022-10-28 Luke Kenneth... restore Z23 shadd/shadduw
2022-10-28 Luke Kenneth... redo the 3-in 1-out move of dsld/dsrd to EXT04 VA2...
2022-10-28 Luke Kenneth... first cut pseudocode for dsld/dsrd to be 3-in 1-out,
2022-10-27 Luke Kenneth... add test for identifying [expr] * name in parser
2022-10-27 Dmitry Selyutinpower_enums: support shadd/shadduw instructions
2022-10-27 Dmitry Selyutinisa/caller.py: support shadd/shadduw instructions
2022-10-27 Luke Kenneth... https://bugs.libre-soc.org/show_bug.cgi?id=966#c4
2022-10-25 Luke Kenneth... code-comments on divmod2du and maddedu are wrong
2022-10-25 Luke Kenneth... comments
2022-10-25 Luke Kenneth... shadd pseudocode cleanup
2022-10-25 Dmitry Selyutinpysvp64asm: support shadd/shadduw instructions
2022-10-25 Dmitry Selyutinpysvp64asm: introduce more flexible Z23 wrapper
2022-10-25 Dmitry Selyutintest_pysvp64dis: test shadd/shadduw instructions
2022-10-25 Dmitry Selyutinbitmanip.mdwn: support shadd/shadduw instructions
2022-10-25 Dmitry Selyutinminor_4.csv: support shadd/shadduw instructions
2022-10-24 Luke Kenneth... add maxs. combined with cmp capability
2022-10-23 Luke Kenneth... use svshape2 instead of svindex for the 4th shape
2022-10-22 Luke Kenneth... add extra pysvp64dis tests for divmod2du and maddedu
2022-10-22 Luke Kenneth... argh, extremely annoying: 4-operand dsld/dsrd is not...
2022-10-22 Luke Kenneth... remove redundant case_dsrd3
2022-10-22 Luke Kenneth... bigint shuffle
2022-10-22 Jacob Lifshayfix get_masked_reg and add test
2022-10-22 Jacob Lifshayformat code removing unused imports
2022-10-21 Luke Kenneth... code-comments
2022-10-21 Luke Kenneth... add 2nd outer loop, CTR 2 rounds, in chacha20 test
2022-10-21 Luke Kenneth... move chacha20 to separate test, set/get masked regs...
2022-10-21 Luke Kenneth... move HASK, ROTL32, ROTL64, MASK32, into helper class
2022-10-21 Luke Kenneth... use XLEN/2 for ROTL32 in fixedshift.mdwn
2022-10-20 Luke Kenneth... comments
2022-10-20 Luke Kenneth... add first chacha20 round test
2022-10-19 Dmitry Selyutinsv_binutils_fptrans: fix registers generation
2022-10-19 Dmitry Selyutinav.mdwn: fix missing bmask operand
2022-10-19 Luke Kenneth... TODO, sort out remap indices order
2022-10-18 Jacob Lifshayadd test for scalar sv.maddedu
2022-10-18 Jacob Lifshayadd missing files to .gitignore
2022-10-17 Dmitry Selyutinav.mdwn: fix Rc-augmented cprop instruction
2022-10-16 Luke Kenneth... debug print correction
2022-10-16 Luke Kenneth... sigh, have to use yield from on get_out_map()
2022-10-16 Luke Kenneth... rewrite get_idx_out2 in ISACaller to split out
2022-10-16 Luke Kenneth... rewrite get_idx_out in ISACaller to split out
2022-10-16 Luke Kenneth... add unit test showing two svindex calls, found bugs,
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