yosys.git
2020-08-18 clairexenMerge pull request #2339 from zachjs/display-format-0s
2020-08-18 clairexenMerge pull request #2338 from zachjs/const-branch-finish
2020-08-18 clairexenMerge pull request #2317 from zachjs/expand-genblock
2020-08-18 Claire WolfMerge branch 'zachjs-const-func-block-var'
2020-08-18 Claire WolfMerge branch 'const-func-block-var' of https://github...
2020-08-18 clairexenMerge pull request #2281 from zachjs/const-real
2020-08-14 Yosys BotBump version
2020-08-13 Dan Ravensloftintel_alm: fix typo in MISTRAL_MUL27X27 cell name
2020-08-13 Yosys BotBump version
2020-08-12 whitequarkMerge pull request #2340 from andy-knowles/cxxrtl-fix...
2020-08-12 Andy Knowlescxxrtl.h: Fix incorrect CarryOut in alu()
2020-08-12 Dan Ravensloftintel_alm: add more megafunctions. NFC.
2020-08-12 Andy Knowlescxxrtl.h: Fix incorrect CarryOut in alu when Bits ...
2020-08-10 Yosys BotBump version
2020-08-09 Zachary SnowPropagate const_fold through generate blocks and branches
2020-08-09 Zachary SnowAllow %0s $display format specifier
2020-08-07 Marcelina KościelnickaReplace opt_rmdff with opt_dff.
2020-08-01 Zachary SnowFix generate scoping issues
2020-07-31 Claire WolfBump YOSYS_VER
2020-07-30 Marcelina KościelnickaAdd dffunmap pass.
2020-07-30 Marcelina Kościelnickaopt_expr: Remove -clkinv option, make it the default.
2020-07-30 Marcelina Kościelnickasynth_ice40: Use opt_dff.
2020-07-30 Marcelina Kościelnickasynth_xilinx: Use opt_dff.
2020-07-30 Marcelina Kościelnickaasync2sync: Support all FF types.
2020-07-30 Marcelina KościelnickaAdd opt_dff pass.
2020-07-30 Marcelina Kościelnickaverilog_backend: Add handling for all FF types.
2020-07-29 Miodrag MilanovićMerge pull request #2314 from YosysHQ/verifix_errorfix
2020-07-29 Miodrag MilanovicClear last error message
2020-07-29 Marcelina Kościelnickaopt_expr: Fix handling of $_XNOR_ cells with A = B.
2020-07-28 Marcelina Kościelnickaffinit: Fortify the code a bit.
2020-07-28 clairexenMerge pull request #2301 from zachjs/for-loop-errors
2020-07-28 clairexenMerge pull request #2306 from YosysHQ/mwk/equiv_induct...
2020-07-27 Marcelina Kościelnickaequiv_induct: Fix up assumption for $equiv cells in...
2020-07-27 Dan Ravensloftintel_alm: direct M10K instantiation
2020-07-26 Dan Ravensloftintel_alm: increase abc9 -W
2020-07-26 clairexenMerge pull request #2299 from zachjs/arg-loop
2020-07-25 Zachary SnowClearer for loop error messages
2020-07-25 Zachary SnowAllow blocks with declarations within constant functions
2020-07-25 Zachary SnowAvoid generating wires for function args which are...
2020-07-24 Marcelina Kościelnickaasync2sync: Refactor to use FfInitVals.
2020-07-24 Marcelina Kościelnickamemory_dff: Refactor to use FfInitVals.
2020-07-24 Marcelina Kościelnickaproc_dlatch: Refactor to use FfInitVals.
2020-07-24 Marcelina Kościelnickapmux2shift: Refactor to use FfInitVals.
2020-07-24 Marcelina Kościelnickawreduce: Refactor to use FfInitVals.
2020-07-24 Marcelina Kościelnickatechmap: Refactor to use FfInitVals.
2020-07-24 Marcelina Kościelnickashregmap: Refactor to use FfInitVals.
2020-07-24 Marcelina Kościelnickaabc: Refactor to use FfInitVals.
2020-07-24 Marcelina Kościelnickadffinit: Refactor to use FfInitVals.
2020-07-24 Marcelina Kościelnickazinit: Refactor to use FfInitVals.
2020-07-24 Marcelina Kościelnickadfflegalize: Refactor to use FfInitVals.
2020-07-24 Marcelina Kościelnickaclk2fflogic: Support all FF types.
2020-07-24 Marcelina Kościelnickasatgen: Add support for dffe, sdff, sdffe, sdffce cells.
2020-07-23 Marcelina KościelnickaAdd utility module for representing flip-flops.
2020-07-23 Marcelina Kościelnickamemory_dff: recognize more dff cells
2020-07-23 Marcelina KościelnickaAdd utility module for dealing with init attributes.
2020-07-23 clairexenMerge pull request #2285 from YosysHQ/mwk/techmap-cellname
2020-07-23 clairexenMerge pull request #2294 from Ravenslofty/intel_alm_timings
2020-07-23 Dan Ravensloftintel_alm: add additional ABC9 timings
2020-07-22 Keith RothmanRemove EXPLICIT_CARRY logic.
2020-07-21 Marcelina Kościelnickatechmap: Add _TECHMAP_CELLNAME_ special parameter.
2020-07-21 clairexenMerge pull request #2215 from boqwxp/qbfsat-solver...
2020-07-20 Alberto Gonzalezsmtio: Emit `mode: start` options before `set-logic...
2020-07-20 Alberto Gonzalezsmtio: Add support for parsing `yosys-smt2-solver-optio...
2020-07-20 Alberto Gonzalezqbfsat: Add `-solver-option` option.
2020-07-20 Alberto Gonzalezsmt2: Add `-solver-option` option.
2020-07-20 clairexenMerge pull request #2282 from YosysHQ/claire/satunsat
2020-07-20 Marcelina Kościelnickacelltypes: Fix EN port name for some FF types.
2020-07-20 Claire WolfOnly allow "sat" and "unsat" smt solver responses in...
2020-07-20 clairexenMerge pull request #2276 from YosysHQ/mwk/satgen-cc
2020-07-20 Zachary SnowAllow reals as constant function parameters
2020-07-18 Marcelina Kościelnickasatgen: Move importCell out of the header.
2020-07-17 Miodrag MilanovićMerge pull request #2275 from YosysHQ/mwk/sf2-clkint-fix
2020-07-17 Marcelina Kościelnickasf2: Emit CLKINT even if -clkbuf not passed
2020-07-17 Miodrag MilanovićMerge pull request #2274 from YosysHQ/mwk/anlogic-ff-fix
2020-07-17 Marcelina Kościelnickaanlogic: Fix FF mapping.
2020-07-16 clairexenMerge pull request #2229 from Ravenslofty/sf2_remove_sf...
2020-07-16 clairexenMerge pull request #2273 from whitequark/write-verilog...
2020-07-16 clairexenMerge pull request #2272 from whitequark/write-verilog-sv
2020-07-16 Miodrag MilanovićMerge pull request #2238 from YosysHQ/mwk/dfflegalize...
2020-07-16 Miodrag MilanovićMerge pull request #2226 from YosysHQ/mwk/nuke-efinix...
2020-07-16 whitequarkverilog_backend: in non-SV mode, add a trigger for...
2020-07-16 whitequarkverilog_backend: add `-sv` option, make `-o <filename...
2020-07-16 whitequarkMerge pull request #2270 from whitequark/cxxrtl-fix...
2020-07-15 whitequarkMerge pull request #2269 from YosysHQ/claire/bisonwall
2020-07-15 Claire WolfTreat all bison warnings as errors in verilog front-end
2020-07-15 Claire WolfUse %precedence in verilog_parser.y
2020-07-15 Claire WolfFix bison warnings for missing %empty
2020-07-15 Claire WolfRun bison with -Wall for verilog front-end
2020-07-15 clairexenMerge pull request #2257 from antmicro/fix-conflicts
2020-07-15 Kamil RakoczyAdd missing semicolons
2020-07-15 Marcelina Kościelnickaopt_merge: Dedup one more use of FF cell type list.
2020-07-14 Marcelina Kościelnickaachronix: Use dfflegalize.
2020-07-14 whitequarkcxxrtl: fix typo. NFC.
2020-07-14 Marcelina Kościelnickaanlogic: Use dfflegalize.
2020-07-13 Marcelina Kościelnickaintel: Use dfflegalize.
2020-07-13 LoftyRevert "intel_alm: direct M10K instantiation"
2020-07-13 whitequarkMerge pull request #2263 from whitequark/cxxrtl-capi...
2020-07-12 whitequarkcxxrtl: expose eval() and commit() via the C API.
2020-07-12 Marcelina Kościelnickaxilinx: Fix srl regression.
2020-07-12 Marcelina Kościelnickaproc_dlatch: Remove init values for combinatorial proce...
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