gem5.git
2012-02-12 Dam Sunwoomem: fix cache stats to use request ids correctly
2012-02-12 Ali Saidimem: Add a master ID to each request object.
2012-02-12 Mrinmoy Ghoshprefetcher: Make prefetcher a sim object instead of...
2012-02-12 Nilay VaishRegressions: Update stats due to change in MESI protocol
2012-02-11 Gabe BlackSPARC: Make PSTATE and HPSTATE a BitUnion.
2012-02-10 Nilay VaishRuby: Remove isTagPresent() calls from Sequencer.cc
2012-02-10 Nilay VaishMESI: Add queues for stalled requests
2012-02-10 Nilay Vaishsim/system: initialize the pagePtr variable
2012-02-10 Nilay VaishRegressions: Update stats due to O3 CPU changes
2012-02-10 Nilay VaishO3 CPU: Improve handling of delayed commit flag
2012-02-10 Nilay VaishO3 CPU: Strengthen condition for handling interrupts
2012-02-10 Nilay VaishO3 CPU: Provide the squashing instruction
2012-02-10 Nilay VaishO3 Fetch: Check if PC is pointing to Microcode ROM
2012-02-10 Gabe BlackSE/FS: Record the system pointer all the time for the...
2012-02-09 Andreas HanssonMEM: Remove onRetryList from BusPort and rely on retryList
2012-02-07 Gabe BlackChecker: Access workload element 0 only if there is...
2012-02-07 Gabe BlackFaults: Turn off arch/faults.hh
2012-02-07 Gabe Blackm5=>gem5: Make the regression script build gem5.* inste...
2012-02-05 Gabe BlackX86: Rename the bridge which allows commnication back...
2012-02-05 Gabe BlackRegressions: Fix the regress script when "all" is used.
2012-02-03 Gabe BlackSystem: Forgot to qrefresh with my last change.
2012-02-03 Gabe BlackSystem: Fix the check which detects running out of...
2012-02-02 Andreas HanssonRegression: Update the regress script after SE/FS merge
2012-02-01 Ali Saidiconfigs: More fixes for the memory system updates
2012-02-01 Gabe BlackMerge ... head, hopefully the last time for this batch.
2012-01-31 Koan-Sin Tanclang: Enable compiling gem5 using clang 2.9 and 3.0
2012-01-31 Andreas HanssonMEM: Remove the otherPort from the cache ports
2012-01-31 Andreas HanssonThread: Use inherited baseCpu rather than cpu in Simple...
2012-01-31 Dam Sunwooutil: implements "writefile" gem5 op to export file...
2012-01-31 Geoffrey BlakeCheckerCPU: Re-factor CheckerCPU to be compatible with...
2012-01-31 Gabe BlackMerge with main repository.
2012-01-30 Andreas HanssonRuby: Connect system port in Ruby network test
2012-01-30 Andreas HanssonMEM: Make the RubyPort physMemPort a PioPort instead...
2012-01-30 Andreas HanssonMEM: Clean-up of Functional/Virtual/TranslatingPort...
2012-01-29 Gabe BlackYet another merge with the main repository.
2012-01-29 Gabe BlackImplement Ali's review feedback.
2012-01-29 Nilay VaishConfig: Enable O3 CPU and Ruby in FS mode
2012-01-29 Nilay VaishX86 Regressions: Update stats due to introduction of TSO
2012-01-29 Nilay VaishO3 CPU LSQ: Implement TSO
2012-01-28 Gabe BlackSE/FS: Get rid of the FULL_SYSTEM config option.
2012-01-28 Gabe BlackSE/FS: Pull FULL_SYSTEM out of the build_opts files
2012-01-28 Gabe BlackSE/FS: Get rid of FULL_SYSTEM in the configs directory
2012-01-28 Gabe BlackSE/FS: Make both SE and FS tests available all the...
2012-01-28 Gabe BlackSE/FS: Make SE vs. FS mode a runtime parameter.
2012-01-28 Gabe BlackMIPS: Fix a compiler warning from the eret instruction.
2012-01-28 Gabe BlackMerge with the main repo.
2012-01-27 Andreas Hanssonns_gige: Fix a missing curly brace in if-statement
2012-01-26 Ronald Dreslinskiconfigs: actually add ARMv7a-like cpu/cache file
2012-01-26 Ronald Dreslinskiconfigs: A more realistic configuration of an ARM-like...
2012-01-25 Andreas HanssonMEM: Fix fs.py by specifying the range size rather...
2012-01-16 Gabe BlackMerge yet again with the main repository.
2012-01-12 Mitchell HayengaFix memory corruption issue with CopyStringOut()
2012-01-25 Ali Saidistats: Update stats for final tick and memory bandwidth...
2012-01-25 Ali Saidisim: display final value of curTick in stats
2012-01-25 Ali SaidiMem: Add simple bandwidth stats to PhysicalMemory
2012-01-23 Nilay VaishConfig: Enable using O3 CPU and Ruby in SE mode
2012-01-23 Nilay VaishO3, Ruby: Forward invalidations from Ruby to O3 CPU
2012-01-23 Nilay VaishMemCmd: Add a command for invalidation requests to LSQ
2012-01-17 Andreas HanssonMEM: Make the bus default port yet another port
2012-01-17 Andreas HanssonMEM: Removing the default port peer from Python ports
2012-01-17 Andreas HanssonMEM: Make the bus bridge unidirectional and fixed addre...
2012-01-17 William WangMEM: Remove the functional ports from the memory system
2012-01-17 Andreas HanssonMEM: Separate queries for snooping and address ranges
2012-01-17 Andreas HanssonMEM: Remove Port removeConn and MemObject deletePortRefs
2012-01-17 Andreas HanssonMEM: Remove the notion of the default port
2012-01-17 Andreas HanssonMEM: Simplify ports by removing EventManager
2012-01-17 Andreas HanssonCPU: Moving towards a more general port across CPU...
2012-01-17 Andreas HanssonMEM: Add port proxies instead of non-structural ports
2012-01-17 Andreas HanssonRuby: Change the access permissions for MOESI hammer
2012-01-17 Andreas HanssonRuby: Change the access permissions for MOESI hammer
2012-01-17 Andreas HanssonMEM: Add the system port as a central access point
2012-01-17 Andreas HanssonMEM: Differentiate functional cache accesses from CPU...
2012-01-17 Ali Saidistats: undo parser change from initparam change
2012-01-17 Steve ReinhardtAlpha: warn_once about broken PAL breakpoints.
2012-01-17 Steve Reinhardtdebug: fix AllFlags::disable()
2012-01-12 Maximilien... inorder: MDU deadlock fix
2012-01-12 Deyuan Guomips: compatibility between MIPS_SE and cross compiler...
2012-01-12 Deyuan Guomips: Fix bugs in faults.cc/hh and tlb.cc for MIPS_FS
2012-01-12 Deyuan Guomips: Fix decoder of two float-convert instructions
2012-01-12 Deyuan Guomips: definition of MIPS64_QNAN in registers.hh
2012-01-12 Nilay VaishPerfectCacheMemory: Remove references to CacheMsg
2012-01-12 Ali SaidiPacket: Put back part of the assert
2012-01-12 Ali SaidiPacket: Remove meaningless assert statement
2012-01-11 Nilay VaishRuby: Use map option for selecting b/w sparse and memor...
2012-01-11 Nilay VaishConfig: Add support for restoring using a timing CPU
2012-01-11 Nilay VaishRuby: Resurrect Cache Warmup Capability
2012-01-11 Nilay VaishRuby Debug Flags: Remove one, add another
2012-01-11 Nilay VaishRuby Port: Add a list of cpu ports attached to this...
2012-01-11 Nilay VaishRuby EventQueue: Remove unused functions
2012-01-11 Nilay VaishRuby Sparse Memory: Add function for collating blocks
2012-01-11 Nilay VaishRuby: Add infrastructure for recording cache contents
2012-01-11 Nilay VaishRuby Memory Vector: Functions for collating and populat...
2012-01-11 Nilay VaishRuby: remove the files related to the tracer
2012-01-11 Nathan Binkerthgfilesize: skip files that have been removed
2012-01-10 Nilay VaishMOESI Hammer: Update regression test output
2012-01-10 Nilay VaishMOESI Hammer: Remove a couple of bugs
2012-01-10 Nilay VaishSparse Memory: Simplify the structure for an entry
2012-01-10 Ali SaidiAutomated merge with ssh://repo.gem5.org/gem5
2012-01-10 Ali Saidiconfig: Fix json output for Python lt 2.6.
2012-01-10 Nilay VaishDPRINTF: Improve some dprintf messages.
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