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gem5.git
2019-10-23 Tommaso Marinelliarch: Drop sysctl support if built against glibc commit | commitdiff | tree
2019-10-22 Giacomo Travagliniconfigs: Clean setupBootLoader signature commit | commitdiff | tree
2019-10-22 Giacomo Travagliniconfigs: Do not assume bootmem is a System child commit | commitdiff | tree
2019-10-22 Giacomo Travaglinidev-arm, configs: Using _on_chip_memory for on chip... commit | commitdiff | tree
2019-10-21 Gabe Blackcpu: Apply the ARM TLB rework to the checker CPU. commit | commitdiff | tree
2019-10-21 Andreas Sandbergmisc: Add Giacomo Travaglini as an Arm maintainer commit | commitdiff | tree
2019-10-19 Gabe Blackcpu,arm: Push the stage 2 MMUs out of the CPU into... commit | commitdiff | tree
2019-10-19 Gabe Blackarch: Remove the "interrupts.hh" switching header file. commit | commitdiff | tree
2019-10-19 Gabe Blackarch: Make a base class for Interrupts. commit | commitdiff | tree
2019-10-18 Tiago Muckdev-arm: Check for gem5 extensions in GicV2 commit | commitdiff | tree
2019-10-18 Bobby R. Brucetests: Added GTests for base/bitfield.hh commit | commitdiff | tree
2019-10-18 Gabe Blackarch: Get rid of the unused GenericTLB. commit | commitdiff | tree
2019-10-18 Gabe Blackcpu: Turn the stage 2 ARM MMUs from params to children. commit | commitdiff | tree
2019-10-18 Gabe Blackx86: Turn the local APIC Interrupts class into a SimObject. commit | commitdiff | tree
2019-10-18 Bobby R. Brucetests: Added GTests for base/atomicio.cc commit | commitdiff | tree
2019-10-18 Andreas Sandbergbase: Add classes that encapsulate a channel address commit | commitdiff | tree
2019-10-18 Gabe Blackmem: Delete the MessageReq and MessageResp memory commands. commit | commitdiff | tree
2019-10-17 Gabe Blackarm: Don't force the ArmISA::TLB in vtophys.cc. commit | commitdiff | tree
2019-10-17 Gabe Blackcpu: Clean up some style issues in pc_event.(hh|cc). commit | commitdiff | tree
2019-10-17 Gabe Blackcpu: Get rid of load count based events. commit | commitdiff | tree
2019-10-16 Andreas Sandbergbase: Add addIntlvBits to AddrRange commit | commitdiff | tree
2019-10-16 Giacomo Travaglinibase: Using scoped string in DPRINTFNR commit | commitdiff | tree
2019-10-16 Giacomo Travaglinibase: Fix gem5.fast compilation commit | commitdiff | tree
2019-10-16 Gabe Blackarch,base,sim: Move Process loader hooks into the Proce... commit | commitdiff | tree
2019-10-15 Gabe Blackx86: Use a std::function to handle MSI completion. commit | commitdiff | tree
2019-10-15 Gabe Blackarch,base: Restructure the object file loaders. commit | commitdiff | tree
2019-10-15 Gabe Blackcpu: Delete the unused sched_break_pc(_sys) functions. commit | commitdiff | tree
2019-10-15 Isaac Richterarch-x86: Make LFENCE a serializing instruction commit | commitdiff | tree
2019-10-15 Giacomo Travaglinidev-arm: Carve out a portion of VExpress_GEM5 for the... commit | commitdiff | tree
2019-10-15 Giacomo Travagliniconfigs: Add simpleSystem helper to generate devices... commit | commitdiff | tree
2019-10-15 Gabe Blacksim,cpu: Get rid of the unused instEventQueue. commit | commitdiff | tree
2019-10-15 Gabe Blackx86: De-x86ify the IntMasterPort. commit | commitdiff | tree
2019-10-14 Bobby R. BruceTests: Added GTests for base/callback.cc commit | commitdiff | tree
2019-10-14 Gabe Blackx86: Simplify and consolidate the code that assembles... commit | commitdiff | tree
2019-10-14 Gabe Blackfastmodel: Expose all CPU communication ports from... commit | commitdiff | tree
2019-10-14 Bobby R. Brucemisc: Updating contributing.md to discuss Gerrit guidelines commit | commitdiff | tree
2019-10-13 Mingyuanmem-cache: set the second chance to false when insertin... commit | commitdiff | tree
2019-10-12 Mingyuanmem-cache: Fixed a bug in MRU replacement policy commit | commitdiff | tree
2019-10-12 Gabe Blackx86: Stop using and delete the x86 IntDevice class. commit | commitdiff | tree
2019-10-12 Gabe Blackarch,base: Separate the idea of a memory image and... commit | commitdiff | tree
2019-10-11 JingQuJQmem-ruby: Allow Ruby to use all replacement policies... commit | commitdiff | tree
2019-10-10 Gabe Blackarch,base: Stop loading the interpreter in ElfObject. commit | commitdiff | tree
2019-10-10 Giacomo Travagliniarch-arm: Move generateDtb to ArmSystem commit | commitdiff | tree
2019-10-10 Giacomo Travaglinidev-arm, configs: Remove RealViewPBX platform commit | commitdiff | tree
2019-10-10 Gabe Blackarch, base: Stop assuming object files have three segments. commit | commitdiff | tree
2019-10-09 Gabe Blackfastmodel: Export GICV3Comms directly. commit | commitdiff | tree
2019-10-09 Bobby R. Brucetests, misc: Updating TESTING.md to describe running... commit | commitdiff | tree
2019-10-09 Bobby R. Brucetests: Migrated refcnt.cc test from src/unitttest to... commit | commitdiff | tree
2019-10-09 Chun-Chen TK Hsusystem-arm: Initialize ICC_SRE_EL3 register of all... commit | commitdiff | tree
2019-10-09 Gabe Blackarch-mips,arch-riscv,base: Get rid of the unused HexFil... commit | commitdiff | tree
2019-10-09 Gabe Blackbase: Rename Section to Segment, and some of its members. commit | commitdiff | tree
2019-10-08 Gabe Blackbase: Get rid of the unused global pointer in object... commit | commitdiff | tree
2019-10-08 Gabe Blackbase: Ensure %p format arguments are printed as pointers. commit | commitdiff | tree
2019-10-07 Gabe Blackfastmodel: Make CortexA76x1's interrupts use gem5's... commit | commitdiff | tree
2019-10-07 Daniel R. Carvalhoconfigs: Isolate ISA related object lists commit | commitdiff | tree
2019-10-07 Ciro Santillikvm, arm: fix the size of MISCREG_FPSR and MISCREG_FPCR commit | commitdiff | tree
2019-10-07 Ciro Santilliconfig: skip access to branchPred in ARM KVM commit | commitdiff | tree
2019-10-05 Gabe Blackbase: ELF segment types are not bitfields. commit | commitdiff | tree
2019-10-04 Tommaso Marinellikvm: Rename gettid() to build with glibc 2.30+ commit | commitdiff | tree
2019-10-03 Tommaso Marinellimem: Remove unused variable commit | commitdiff | tree
2019-10-03 Ayaz Akramtests: Fix a minor bug in fixture.py commit | commitdiff | tree
2019-10-03 Bobby R. Brucedev, misc: Fixing "may be used unitialized" compilation... commit | commitdiff | tree
2019-10-03 Jason Lowe... sim-se: Fix invalid delete of params on clone commit | commitdiff | tree
2019-10-03 Giacomo Travagliniarch-arm: Annotate CM flag in AA64 CM Instructions commit | commitdiff | tree
2019-10-03 Giacomo Travagliniarch-arm: Set CM bit in DataAbort commit | commitdiff | tree
2019-10-02 Giacomo Travaglinisim: Mark System::getThreadContext method as const commit | commitdiff | tree
2019-10-02 Marc Mari Barcelodev-arm: Improve fault message on SMMUv3 translation... commit | commitdiff | tree
2019-10-02 Marc Mari Barcelodev-arm: Fix address used to update the SMMUv3 Walk... commit | commitdiff | tree
2019-10-02 Giacomo Travagliniarch-arm: Create helper for sending events (SEV) commit | commitdiff | tree
2019-10-02 Gabe Blackfastmodel: Get rid of the back channel mem port in... commit | commitdiff | tree
2019-10-02 Gabe Blackfastmodel: Implement a custom sendFunctional for Cortex... commit | commitdiff | tree
2019-10-02 Gabe Blackx86: Switch from MessageReq and Resp to WriteReq and... commit | commitdiff | tree
2019-10-02 Gabe Blackfastmodel: Let the EVS set an attribute for getSendFunc... commit | commitdiff | tree
2019-10-01 Georg Kotheimerstyle: normalize filename in SortedIncludes.fix() commit | commitdiff | tree
2019-10-01 Gabe Blackfastmodel: Add a gem5Cpu attribute to the CortexA76x1. commit | commitdiff | tree
2019-10-01 Gabe Blackfastmodel: Add a utility class which makes it easier... commit | commitdiff | tree
2019-10-01 Gabe Blackfastmodel: Pull out and simplify the interrupt mechanis... commit | commitdiff | tree
2019-10-01 Daniel R. Carvalhomem-cache: Fix invalid whenReady commit | commitdiff | tree
2019-10-01 Daniel R. Carvalhoconfigs: Port PlatformConfig to the common object list commit | commitdiff | tree
2019-10-01 Daniel R. Carvalhoconfigs: Port MemConfig to the common object list commit | commitdiff | tree
2019-10-01 Daniel R. Carvalhoconfigs: Port HWPConfig to the common object list commit | commitdiff | tree
2019-10-01 Daniel R. Carvalhoconfigs: Port BPConfig to use the common object list commit | commitdiff | tree
2019-09-30 Daniel R. Carvalhoconfigs: Port CPUConfig to use the common object list commit | commitdiff | tree
2019-09-30 Daniel R. Carvalhoconfigs: Create a basic ObjectList commit | commitdiff | tree
2019-09-30 Daniel R. Carvalhoconfigs: Remove is_atomic_cpu check commit | commitdiff | tree
2019-09-30 Daniel R. Carvalhomem-ruby: Remove inexistent functions from Util commit | commitdiff | tree
2019-09-30 Daniel R. Carvalhomem-ruby: Make bitSelect use bits<Addr> commit | commitdiff | tree
2019-09-30 Daniel R. Carvalhomem-ruby: Fix maskLowOrderBits commit | commitdiff | tree
2019-09-30 Daniel R. Carvalhomem-ruby: Remove shiftLowOrderBits commit | commitdiff | tree
2019-09-30 Daniel R. Carvalhomem-ruby: Remove maskHighOrderBits commit | commitdiff | tree
2019-09-30 Daniel R. Carvalhomem-ruby: Remove bitRemove commit | commitdiff | tree
2019-09-30 Nikos Nikoleriscpu: Make use of DRAMCtrl::AddrMap in the traffic gener... commit | commitdiff | tree
2019-09-30 Bobby R. Brucemisc: Added line wrapping functionality for Sim-Object... commit | commitdiff | tree
2019-09-30 Andreas Sandbergmem: Use new-style stats in the XBar models commit | commitdiff | tree
2019-09-30 Andreas Sandbergmem-cache: Switch to new-style stats commit | commitdiff | tree
2019-09-30 Andreas Sandbergmem: Convert DRAM controller to new-style stats commit | commitdiff | tree
2019-09-28 Timothy Hayesruby: 2x protocols has typo/syntax error that fails... commit | commitdiff | tree
2019-09-27 Gabe Blackfastmodel: Add glue code which adapts fastmodels to... commit | commitdiff | tree
2019-09-26 Andreas Sandbergsim: Convert power modelling framework to new-style... commit | commitdiff | tree
2019-09-26 Andreas Sandbergstats: Add a preDumpStats() callback to Stats::Group commit | commitdiff | tree
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