yosys.git
2018-03-07 Clifford WolfSet Verific db_preserve_user_nets flag
2018-03-07 Clifford WolfAdd Xilinx RAM64X1D and RAM128X1D simulation models
2018-03-06 Clifford WolfAdd "memory_nordff" pass
2018-03-06 Clifford WolfUpdate comment about supported SVA in verificsva.cc
2018-03-06 Clifford WolfAdd SVA NON_CONSECUTIVE_REPEAT and GOTO_REPEAT support
2018-03-06 Clifford WolfAdd SVA first_match() support
2018-03-06 Clifford WolfAdd SVA within support
2018-03-06 Clifford WolfAdd support for SVA sequence intersect
2018-03-06 Clifford WolfAdd get_fsm_accept_reject for parsing SVA properties
2018-03-06 Clifford WolfSimplified SVA "until" handling
2018-03-05 Clifford WolfImporove yosys-smtbmc error handling, Improve VCD output
2018-03-04 Clifford WolfFix connwrappers help message
2018-03-04 Clifford WolfImprove handling of warning messages
2018-03-04 Clifford WolfUpdate copyright header
2018-03-04 Clifford WolfImprove SMT2 encoding of $reduce_{and,or,bool}
2018-03-04 Clifford WolfFix a hangup in yosys-smtbmc error handling
2018-03-04 Clifford WolfAdd proper SVA seq.triggered support
2018-03-04 Clifford WolfAdd "synth -noshare"
2018-03-04 Clifford WolfAdd Verific SVA support for "seq and seq" expressions
2018-03-04 Clifford WolfRefactor Verific SVA importer property parser
2018-03-04 Clifford WolfAdd VerificClocking class and refactor Verific DFF...
2018-03-03 Clifford WolfImproved error handling in yosys-smtbmc
2018-03-03 Clifford WolfAdd SVA support for sequence OR
2018-03-03 Clifford WolfTerminate running SMT solver when smtbmc is terminated
2018-03-03 Clifford WolfFix smtbmc smtc/aiw parser for wire names containing []
2018-03-02 Clifford WolfFix handling of SVA "until seq.triggered" properties
2018-03-02 Clifford WolfUpdate SVA cheat sheet in verificsva.cc
2018-03-01 Clifford WolfFix in Verific SVA importer handling of until_with
2018-03-01 Clifford WolfMangle names with square brackets in VCD files to work...
2018-03-01 Clifford WolfFixes and improvements in Verific SVA importer
2018-03-01 Clifford WolfAdd $rose/$fell support to Verific bindings
2018-02-28 Clifford WolfMerge branch 'verificsva-ng'
2018-02-28 Clifford WolfAdd support for PRIM_SVA_UNTIL to new SVA importer
2018-02-28 Clifford WolfAdd DFSM generator to verific SVA importer
2018-02-28 Clifford WolfContinue refactoring of Verific SVA importer code
2018-02-27 Clifford WolfMajor redesign of Verific SVA importer
2018-02-27 Clifford WolfAdd -lz for verific builds
2018-02-26 Clifford WolfAdd handling of verific OPER_REDUCE_NOR
2018-02-26 Clifford WolfAdd handling of verific OPER_SELECTOR and OPER_WIDE_SEL...
2018-02-26 Clifford WolfAdd handling of verific OPER_NTO1MUX and OPER_WIDE_NTO1MUX
2018-02-26 Clifford WolfAdd "SVA syntax cheat sheet" comment to verificsva.cc
2018-02-26 Clifford WolfAdd $dlatchsr support to clk2fflogic
2018-02-26 Clifford WolfSmall fixes and improvements in $allconst/$allseq handling
2018-02-26 Clifford WolfFix opt_rmdff handling of $dlatchsr
2018-02-23 Clifford WolfMerge branch 'forall'
2018-02-23 Clifford WolfAdd smtbmc support for exist-forall problems
2018-02-23 Clifford WolfAdd $allconst and $allseq cell types
2018-02-22 Clifford WolfAdd Verific SVA support for ranges in repetition operator
2018-02-21 Clifford WolfAdd support for SVA throughout via Verific
2018-02-20 Clifford WolfAdd support for mockup clock signals in yosys-smtbmc...
2018-02-19 Clifford WolfMerge pull request #507 from cr1901/msys2
2018-02-19 William D.... Improve msys2 flags for building abc.
2018-02-18 Clifford WolfAdd support for SVA sequence concatenation ranges via...
2018-02-18 Clifford WolfAdd support for SVA until statements via Verific
2018-02-18 Clifford WolfMove Verific SVA importer to extra C++ source file
2018-02-18 Clifford WolfMerge Verific SVA preprocessor and SVA importer
2018-02-16 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2018-02-15 Clifford WolfImprove handling of "bus" pins in liberty front-end...
2018-02-15 Clifford WolfFix verific PRIM_SVA_AT handling in properties with...
2018-02-13 Clifford WolfFixed yosys-config for binary distributions with Verific
2018-02-13 Clifford WolfRecognize stand-alone obj pattern even when it contains...
2018-02-08 Clifford WolfFix handling of zero-length cell connections in SMT2...
2018-02-03 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2018-02-03 Clifford WolfDo not create deep backtraces unless in ENABLE_DEBUG...
2018-02-03 Clifford WolfMerge pull request #488 from azonenberg/for_clifford
2018-02-03 Clifford WolfFixed gcc 7.2 "statement will never be executed" warning
2018-02-01 Clifford WolfFix single-bit $stable handling in verific front-end
2018-01-31 Clifford WolfAdd Verific attribute handling for assert/assume/cover...
2018-01-29 Clifford WolfFix smtio.py for large SMT2 S-expressions
2018-01-28 Clifford WolfFix permissions on verific vdb files
2018-01-23 Clifford WolfFixed handling of synchronous and asynchronous assertio...
2018-01-19 Clifford WolfUse "strip -S" instead of "strip -d" for Mac OS X compa...
2018-01-19 Clifford WolfImprove log messages in equiv_make
2018-01-18 Clifford WolfMove user-provided smt2 info stmts to the top of the...
2018-01-18 Robert Oucoolrunner2: Move LOC attributes onto the IO cells
2018-01-17 Clifford WolfStrip debug symbols from binaries on install
2018-01-09 Clifford WolfAdd "dffinit -highlow" and fix synth_intel
2018-01-07 Clifford WolfAdd support for "yosys -E"
2018-01-07 Clifford WolfBugfix in hierarchy blackbox module port width handling
2018-01-07 Clifford WolfUpdate ABC to hg rev 6e3c24b3308a
2018-01-05 Clifford WolfMerge pull request #479 from Fatsie/latch_without_data
2018-01-05 Clifford WolfBugfix in hierarchy handling of blackbox module ports
2018-01-04 Clifford WolfMerge pull request #480 from Fatsie/liberty_value_expre...
2018-01-04 Clifford WolfTemporarily derive blackbox modules in hierarchy to...
2018-01-03 Staf VerhaegenValue of properties can be expression.
2018-01-03 Staf VerhaegenSome standard cell libraries include a latch with only...
2017-12-24 Clifford WolfAdd "no driver for signal bit" error msg to btor back-end
2017-12-24 Clifford WolfBugfix in verilog_defaults argument parser
2017-12-19 Clifford WolfFix minor typo in "prep" help message
2017-12-17 Clifford WolfSimple fix BTOR memory encoding
2017-12-17 Clifford WolfImprove BTOR memory encoding
2017-12-15 Clifford WolfMerge branch 'btor-ng'
2017-12-15 Clifford WolfAdd array support to btor back-end
2017-12-14 Clifford WolfAdd $anyconst/$anyseq support to btor back-end
2017-12-14 Clifford WolfMerge branch 'master' into btor-ng
2017-12-14 Clifford WolfAdd yosys-smtbmc VCD writer support for memories with...
2017-12-14 Clifford WolfFix a bug in clk2fflogic memory handling
2017-12-14 Clifford WolfMerge branch 'master' into btor-ng
2017-12-14 Clifford WolfAdd clk2fflogic memory support
2017-12-14 Clifford WolfAdd smt2 back-end support for async write memories
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