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nmigen.git
2020-05-24 Robin Ole Heinemannhdl.ast: fix typo commit | commitdiff | tree
2020-05-22 whitequarkback.verilog: fall back to nmigen_yosys package. commit | commitdiff | tree
2020-05-21 whitequarkUpdate .gitignore. commit | commitdiff | tree
2020-05-21 whitequarkvendor.intel: don't use `write_verilog -decimal`. commit | commitdiff | tree
2020-05-21 whitequarkvendor.intel: double-quote Tcl values rather than brace... commit | commitdiff | tree
2020-05-21 whitequarkvendor.xilinx_{7series,ultrascale}: don't use `write_ve... commit | commitdiff | tree
2020-05-20 whitequarkbuild.plat: skip clock constraints on unused signals. commit | commitdiff | tree
2020-05-20 whitequarkvendor.xilinx_{7series,ultrascale}: add (*keep*) on... commit | commitdiff | tree
2020-05-20 whitequarkhdl.ast: add const-shift operations. commit | commitdiff | tree
2020-05-19 whitequarkhdl.ast: clarify docs for Value.rotate_{left,right}. commit | commitdiff | tree
2020-05-19 whitequarkhdl.dsl: check for unique domain name. commit | commitdiff | tree
2020-05-19 whitequarkback.rtlil: handle signed and large Instance parameters... commit | commitdiff | tree
2020-05-17 whitequarktracer: fix get_var_name() to work on toplevel attributes. commit | commitdiff | tree
2020-05-08 Gwenhael Goavec... vendor.lattice_machxo2: generate binary bitstreams. commit | commitdiff | tree
2020-05-02 whitequarkplat, vendor: systematically escape net and file names... commit | commitdiff | tree
2020-04-28 whitequarkback.rtlil: fix incorrect escaping of signed parameters. commit | commitdiff | tree
2020-04-27 whitequarkhdl.ast: use SignalSet, not ValueSet, for _[lr]hs_signa... commit | commitdiff | tree
2020-04-27 whitequarklib.cdc: add missing documentation for AsyncFFSynchroni... commit | commitdiff | tree
2020-04-24 awyglelib.fifo: add r_rst output for AsyncFIFO{,Buffered}. commit | commitdiff | tree
2020-04-24 awyglehdl.ir: typecheck `convert(ports=)` more carefully. commit | commitdiff | tree
2020-04-24 whitequarkREADME: link directly to Yosys build instructions. commit | commitdiff | tree
2020-04-23 Teguh Hofsteeback.verilog: add workaround for evaluation Verific... commit | commitdiff | tree
2020-04-22 Teguh Hofsteeback.verilog: make Yosys version check compatible with... commit | commitdiff | tree
2020-04-21 Kate Temkinvendor: use nextpnr -12k for -12F devices; remove theor... commit | commitdiff | tree
2020-04-16 anuejnhdl.rec: make Record inherit from UserValue. working_23jun2020 commit | commitdiff | tree
2020-04-15 whitequarkback.rtlil: translate enum decoders to Yosys enum attri... commit | commitdiff | tree
2020-04-14 whitequarkbuil.plat: enable strict undefined behavior in Jinja2. commit | commitdiff | tree
2020-04-13 whitequarkback.rtlil: don't emit connections to zero width ports. commit | commitdiff | tree
2020-04-13 whitequarkback.rtlil: refuse to create extremely large wires. commit | commitdiff | tree
2020-04-13 whitequarkback.rtlil: fix expansion of Part() for partial dummy... commit | commitdiff | tree
2020-04-13 whitequarkback.rtlil: fix legalization of Part() with stride. commit | commitdiff | tree
2020-04-13 whitequarkClarify a few comments. NFC. commit | commitdiff | tree
2020-04-13 Dan Ravenslofthdl.ast: add Value.{rotate_left,rotate_right}. commit | commitdiff | tree
2020-04-13 whitequarkTravis: require tests to pass on pypy3. commit | commitdiff | tree
2020-04-13 whitequarkTravis: upgrade to bionic. commit | commitdiff | tree
2020-04-12 whitequarkbuild.run: fix BuildProducts.extract to work with subdi... commit | commitdiff | tree
2020-04-12 whitequarkhdl.rec: improve repr() for Layout. commit | commitdiff | tree
2020-04-12 whitequarkhdl.ast: improve repr() for Shape. commit | commitdiff | tree
2020-04-12 whitequarkbuild.plat: don't check for toolchain presence if do_bu... commit | commitdiff | tree
2020-04-08 Stuart Olsenback.pysim: Clear pending updates after they are effected commit | commitdiff | tree
2020-04-07 Stuart Olsenback.pysim: Eliminate duplicate dict lookup in VCD... commit | commitdiff | tree
2020-04-07 Stuart Olsenback.pysim: Reuse clock simulation commands commit | commitdiff | tree
2020-04-05 whitequarkhdl.mem: fix source location of ReadPort.en. commit | commitdiff | tree
2020-04-03 whitequarkback.pysim: fix emission of undriven traces to VCD... commit | commitdiff | tree
2020-04-02 whitequarksetup: bump pyvcd to ~=0.2. commit | commitdiff | tree
2020-04-02 Jacob LifshayAdd support for using non-compat Elaboratable instances... commit | commitdiff | tree
2020-04-02 whitequarksetup: tighten version constraint on Jinja2. commit | commitdiff | tree
2020-03-22 whitequarkhdl.ast: implement abs() on values. commit | commitdiff | tree
2020-03-20 WRansohoffvendor.lattice_ice40: add support for SB_[LH]FOSC as... commit | commitdiff | tree
2020-03-15 Nicolas Robinvendor: fix typo `async_ff_sync` commit | commitdiff | tree
2020-03-15 Stuart Olsenback.pysim: implement modulus operator. commit | commitdiff | tree
2020-03-14 awygleCorrectly handle resets in AsyncFIFO. commit | commitdiff | tree
2020-03-12 whitequarkvendor: fix a few issues in commit 2f8669ca. commit | commitdiff | tree
2020-03-08 awyglelib.cdc: extract AsyncFFSynchronizer. commit | commitdiff | tree
2020-02-19 whitequarkhdl.ast: fix off-by-1 in Initial.__init__(). commit | commitdiff | tree
2020-02-19 whitequarkback.pysim: fix RHS codegen for Cat() and Repl(...... commit | commitdiff | tree
2020-02-19 whitequarkback.pysim: optionally allow introspecting generated... commit | commitdiff | tree
2020-02-16 awyglenmigen.compat.genlib.cdc: add PulseSynchronizer. commit | commitdiff | tree
2020-02-16 awyglenmigen.lib.cdc: port PulseSynchronizer. commit | commitdiff | tree
2020-02-14 whitequarkTravis: prune dependencies. v0.2 commit | commitdiff | tree
2020-02-14 whitequarkTravis: test on Python 3.8. commit | commitdiff | tree
2020-02-12 whitequarkcli: update use of deprecated code. commit | commitdiff | tree
2020-02-12 whitequarkback.pysim: accept write_vcd(vcd_file=None). commit | commitdiff | tree
2020-02-09 whitequarksetup: update project URLs. commit | commitdiff | tree
2020-02-09 whitequarkdoc: remove outdated files and references to them. commit | commitdiff | tree
2020-02-08 whitequarkREADME: link to IRC channel. commit | commitdiff | tree
2020-02-08 whitequarkREADME: consolidate requirements in the Installation... commit | commitdiff | tree
2020-02-07 whitequarktest_build_res: fix after commit 3e2ecdf2. commit | commitdiff | tree
2020-02-06 whitequarkbuild.res,vendor: place clock constraint on port, not... commit | commitdiff | tree
2020-02-06 whitequarkxilinx_{7series,ultrascale}: run `report_methodology`. commit | commitdiff | tree
2020-02-06 whitequarkhdl.ast: add Value.{as_signed,as_unsigned}. commit | commitdiff | tree
2020-02-06 whitequarktest_lib_fifo: define all referenced FSM states. commit | commitdiff | tree
2020-02-06 whitequarkhdl.dsl: make referencing undefined FSM states an error. commit | commitdiff | tree
2020-02-06 whitequarkhdl.ir: type check ports. commit | commitdiff | tree
2020-02-06 whitequarkback.pysim: emit toplevel inputs in VCD files as well. commit | commitdiff | tree
2020-02-06 whitequarkback.pysim: make `write_vcd(traces=)` actually use... commit | commitdiff | tree
2020-02-06 whitequarkhdl.dsl: reject name mismatch in `m.domains.<name>... commit | commitdiff | tree
2020-02-06 whitequarkhdl.dsl: type check when adding to m.domains. commit | commitdiff | tree
2020-02-06 whitequarkhdl.mem: add synthesis attribute support. commit | commitdiff | tree
2020-02-06 whitequarkhdl.mem: document Memory. commit | commitdiff | tree
2020-02-04 whitequarkhdl.{ast,dsl}: allow whitespace in bit patterns. commit | commitdiff | tree
2020-02-01 whitequarkhdl.ast: update documentation for Signal. commit | commitdiff | tree
2020-02-01 whitequarkhdl.ast: prohibit shifts by signed value. commit | commitdiff | tree
2020-02-01 whitequarkbuild.plat: align pipeline with Fragment.prepare(). commit | commitdiff | tree
2020-02-01 whitequarkhdl.dsl: don't allow inheriting from Module. commit | commitdiff | tree
2020-02-01 whitequarkhdl.ast: warn on unused property statements (Assert... commit | commitdiff | tree
2020-02-01 whitequark_unused: extract must-use logic from hdl.ir. commit | commitdiff | tree
2020-01-31 whitequarkhdl.dsl: add missing case width check for Enum values. commit | commitdiff | tree
2020-01-31 whitequarkREADME: clarify relationship to Migen. commit | commitdiff | tree
2020-01-31 whitequarkhdl.dsl: make `if m.{If,Elif,Else}(...)` a syntax error. commit | commitdiff | tree
2020-01-31 whitequarkback.rtlil: don't emit wires for empty signals. commit | commitdiff | tree
2020-01-31 Mike Waltersvendor.lattice_ecp5: support internal oscillator (OSCG). commit | commitdiff | tree
2020-01-31 Jaro Habigerbuild.dsl: allow strings to be used as connector numbers. commit | commitdiff | tree
2020-01-31 Sylvain Munautvendor.lattice_{ice40,ecp5}: Support .il (RTLIL) files... commit | commitdiff | tree
2020-01-27 whitequarkUpdate README. commit | commitdiff | tree
2020-01-18 whitequarkhdl.ir: resolve hierarchy conflicts before creating... commit | commitdiff | tree
2020-01-17 whitequarkhdl.xfrm: transform drivers as well in DomainRenamer. commit | commitdiff | tree
2020-01-12 whitequarkRemove everything deprecated in nmigen 0.1. commit | commitdiff | tree
2020-01-11 Staf VerhaegenSignal: allow to use integral Enum for reset value. commit | commitdiff | tree
2020-01-09 schwigivendor.intel: fix output enable width for XDR=0 case. commit | commitdiff | tree
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