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litex.git
2012-08-26
Florent Kermarrec
add tb_RecorderCsr.py
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2012-08-26
Florent Kermarrec
split migScope to trigger & recorder
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2012-08-26
Florent Kermarrec
add vcd generator
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2012-08-26
Florent Kermarrec
tb_TriggerCsr.py : use truth table generator for Sum Lut
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2012-08-26
Florent Kermarrec
add truth table generator
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2012-08-26
Florent Kermarrec
tb_spi2Csr: Add clk_ratio
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2012-08-25
Florent Kermarrec
- fix Spi2Csr mistakes
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2012-08-25
Florent Kermarrec
add sim: tb_Spi2Csr.py (skeleton, WIP)
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2012-08-25
Florent Kermarrec
add sim: tb_TriggerCsr.py
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2012-08-23
Florent Kermarrec
use ram for Sum
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2012-08-22
Florent Kermarrec
Add simulation skeleton
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2012-08-12
Florent Kermarrec
new library spi2Csr (skeleton)
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2012-08-12
Florent Kermarrec
add register interface to Trigger
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2012-08-12
Florent Kermarrec
simplify EdgeDetector
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2012-08-12
Florent Kermarrec
fix masks on EdgeDetector
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2012-08-12
Florent Kermarrec
add Trigger
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2012-08-12
Florent Kermarrec
rename Recorder --> Storage
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2012-08-12
Florent Kermarrec
add simple Sequencer
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2012-08-12
Florent Kermarrec
add Readme
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2012-08-12
Florent Kermarrec
add Readme
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2012-08-12
Florent Kermarrec
- init Repo
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