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yosys.git
2019-12-04 Marcin Kościelnickiiopadmap: Refactor and fix tristate buffer mapping... commit | commitdiff | tree
2019-12-04 Marcin Kościelnickixilinx: Add models for LUTRAM cells. (#1537) commit | commitdiff | tree
2019-12-03 Clifford WolfMerge pull request #1524 from pepijndevos/gowindffinit commit | commitdiff | tree
2019-12-03 Pepijn de Vosupdate test commit | commitdiff | tree
2019-12-03 Pepijn de VosUse -match-init to not synth contradicting init values commit | commitdiff | tree
2019-12-02 David ShahMerge pull request #1542 from YosysHQ/dave/abc9-loop-fix commit | commitdiff | tree
2019-12-02 Clifford WolfMerge pull request #1539 from YosysHQ/mwk/ilang-bounds... commit | commitdiff | tree
2019-12-01 David Shahabc9: Fix breaking of SCCs commit | commitdiff | tree
2019-11-29 Miodrag MilanovićMerge pull request #1540 from YosysHQ/mwk/xilinx-bufpll commit | commitdiff | tree
2019-11-29 Marcin Kościelnickixilinx: Add missing blackbox cell for BUFPLL. commit | commitdiff | tree
2019-11-28 Eddie HungRevert "Fold loop" commit | commitdiff | tree
2019-11-27 Marcin Kościelnickiread_ilang: do bounds checking on bit indices commit | commitdiff | tree
2019-11-27 Eddie HungMerge pull request #1536 from YosysHQ/eddie/xilinx_dsp_... commit | commitdiff | tree
2019-11-27 Clifford WolfMerge pull request #1501 from YosysHQ/dave/mem_copy_attr commit | commitdiff | tree
2019-11-27 Clifford WolfMerge pull request #1534 from YosysHQ/mwk/opt_share-fix commit | commitdiff | tree
2019-11-27 Eddie HungMerge pull request #1535 from YosysHQ/eddie/write_xaige... commit | commitdiff | tree
2019-11-27 Eddie HungNo need for -abc9 commit | commitdiff | tree
2019-11-27 Marcin Kościelnickiopt_share: Fix handling of fine cells. commit | commitdiff | tree
2019-11-27 Eddie Hunglatch -> box commit | commitdiff | tree
2019-11-27 Eddie HungAdd citation commit | commitdiff | tree
2019-11-27 Eddie HungCheck for either sign or zero extension for postAdd... commit | commitdiff | tree
2019-11-27 Eddie HungRemove notes commit | commitdiff | tree
2019-11-27 Eddie HungFold loop commit | commitdiff | tree
2019-11-27 Eddie HungDo not sigmap keep bits inside write_xaiger commit | commitdiff | tree
2019-11-27 Eddie Hungxaiger: do not promote output wires commit | commitdiff | tree
2019-11-27 Eddie HungAdd testcase derived from fastfir_dynamictaps benchmark commit | commitdiff | tree
2019-11-26 Marcin Kościelnickixilinx: Add simulation models for IOBUF and OBUFT. commit | commitdiff | tree
2019-11-25 Marcin Kościelnickiclkbufmap: Add support for inverters in clock path. commit | commitdiff | tree
2019-11-25 Marcin Kościelnickixilinx: Use INV instead of LUT1 when applicable commit | commitdiff | tree
2019-11-25 Pepijn de Vosattempt to fix formatting commit | commitdiff | tree
2019-11-25 Pepijn de Vosgowin: add and test dff init values commit | commitdiff | tree
2019-11-23 Eddie HungMerge pull request #1520 from pietrmar/fix-1463 commit | commitdiff | tree
2019-11-23 Martin Pietrykacoolrunner2: remove spurious log_pop() call, fixes... commit | commitdiff | tree
2019-11-22 Clifford WolfMerge pull request #1517 from YosysHQ/clifford/optmem commit | commitdiff | tree
2019-11-22 Clifford WolfMerge pull request #1515 from YosysHQ/clifford/svastuff commit | commitdiff | tree
2019-11-22 Clifford WolfAdd "opt_mem" pass commit | commitdiff | tree
2019-11-22 Clifford WolfAdd Verific support for SVA nexttime properties commit | commitdiff | tree
2019-11-22 Clifford WolfImprove handling of verific primitives in "verific... commit | commitdiff | tree
2019-11-22 Clifford WolfAdd Verific SVA support for "always" properties commit | commitdiff | tree
2019-11-22 Clifford WolfMerge pull request #1511 from YosysHQ/dave/always commit | commitdiff | tree
2019-11-22 Marcin Kościelnickigowin: Remove show command from tests. commit | commitdiff | tree
2019-11-22 Marcin Kościelnickigowin: Add missing .gitignore entries commit | commitdiff | tree
2019-11-22 David ShahUpdate CHANGELOG and README commit | commitdiff | tree
2019-11-21 David Shahsv: Add tests for SV always types commit | commitdiff | tree
2019-11-21 David Shahproc_dlatch: Add error handling for incorrect always_... commit | commitdiff | tree
2019-11-21 David Shahsv: Correct parsing of always_comb, always_ff and alway... commit | commitdiff | tree
2019-11-20 Clifford WolfMerge pull request #1507 from YosysHQ/clifford/verificfixes commit | commitdiff | tree
2019-11-20 Clifford WolfCorrectly treat empty modules as blackboxes in Verific commit | commitdiff | tree
2019-11-20 Clifford WolfDo not rename VHDL entities to "entity(impl)" when... commit | commitdiff | tree
2019-11-19 Clifford WolfMerge pull request #1449 from pepijndevos/gowin commit | commitdiff | tree
2019-11-19 Pepijn de VosRemove dff init altogether commit | commitdiff | tree
2019-11-19 Marcin KościelnickiFix #1462, #1480. commit | commitdiff | tree
2019-11-19 Marcin Kościelnickixilinx: Add simulation models for MULT18X18* and DSP48A*. commit | commitdiff | tree
2019-11-18 David Shahmemory_collect: Copy attr from RTLIL::Memory to cell commit | commitdiff | tree
2019-11-18 Pepijn de Vosadd help for nowidelut and abc9 options commit | commitdiff | tree
2019-11-18 Clifford WolfMerge pull request #1497 from YosysHQ/mwk/extract-fa-fix commit | commitdiff | tree
2019-11-18 whitequarkMerge pull request #1494 from whitequark/write_verilog... commit | commitdiff | tree
2019-11-18 Marcin KościelnickiFix #1496. commit | commitdiff | tree
2019-11-18 whitequarkwrite_verilog: add -extmem option, to write split memor... commit | commitdiff | tree
2019-11-17 Clifford WolfMerge pull request #1492 from YosysHQ/dave/wreduce... commit | commitdiff | tree
2019-11-16 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ... commit | commitdiff | tree
2019-11-15 David Shahecp5: Use new autoname pass for better cell/net names commit | commitdiff | tree
2019-11-14 David Shahwreduce: Don't trim zeros or sext when not matching... commit | commitdiff | tree
2019-11-14 Clifford WolfMerge pull request #1490 from YosysHQ/clifford/autoname commit | commitdiff | tree
2019-11-14 Clifford WolfMerge pull request #1444 from btut/feature/python_wrapp... commit | commitdiff | tree
2019-11-14 Clifford WolfMerge pull request #1465 from YosysHQ/dave/ice40_timing_sim commit | commitdiff | tree
2019-11-14 Clifford WolfMerge branch 'makaimann-label-bads-btor' commit | commitdiff | tree
2019-11-14 Clifford WolfUse cell name for btor bad state props when it is a... commit | commitdiff | tree
2019-11-14 Clifford WolfMerge branch 'label-bads-btor' of https://github.com... commit | commitdiff | tree
2019-11-13 Clifford WolfAdd "autoname" pass and use it in "synth_ice40" commit | commitdiff | tree
2019-11-13 whitequarkMerge pull request #1488 from whitequark/flowmap-fixes commit | commitdiff | tree
2019-11-13 Clifford WolfMerge pull request #1486 from YosysHQ/clifford/fsmdetectfix commit | commitdiff | tree
2019-11-12 Clifford WolfUpdate fsm_detect bugfix commit | commitdiff | tree
2019-11-12 Clifford WolfBugfix in fsm_detect commit | commitdiff | tree
2019-11-12 Clifford WolfMerge pull request #1484 from YosysHQ/clifford/cmp2luteqne commit | commitdiff | tree
2019-11-12 Makai MannAdd an info string symbol for bad states in btor backend commit | commitdiff | tree
2019-11-12 whitequarkflowmap: when doing mincut, ensure source is always... commit | commitdiff | tree
2019-11-11 whitequarkflowmap: don't break if that creates a k+2 (and larger... commit | commitdiff | tree
2019-11-11 Pepijn de Vosfix fsm test with proper clock enable polarity commit | commitdiff | tree
2019-11-11 Pepijn de VosMerge branch 'master' of https://github.com/YosysHQ... commit | commitdiff | tree
2019-11-11 Miodrag MilanovicFixed tests commit | commitdiff | tree
2019-11-11 Clifford WolfDo not map $eq and $ne in cmp2lut, only proper arithmet... commit | commitdiff | tree
2019-11-10 Clifford WolfMerge pull request #1470 from YosysHQ/clifford/subpassdoc commit | commitdiff | tree
2019-11-07 Clifford WolfAdd check for valid macro names in macro definitions commit | commitdiff | tree
2019-11-06 Pepijn de Vosfix wide luts commit | commitdiff | tree
2019-11-06 Marcin Kościelnickisynth_xilinx: Merge blackbox primitive libraries. commit | commitdiff | tree
2019-11-04 Clifford WolfFix write_aiger bug added in 524af21 commit | commitdiff | tree
2019-10-31 Clifford WolfAdd CodingReadme section on script passes commit | commitdiff | tree
2019-10-30 Pepijn de Vosdon't cound exact luts in big muxes; futile and fragile commit | commitdiff | tree
2019-10-28 Pepijn de Vosadd IOBUF commit | commitdiff | tree
2019-10-28 Pepijn de Vosadd tristate buffer and test commit | commitdiff | tree
2019-10-28 Pepijn de Vosdo not use wide luts in testcase commit | commitdiff | tree
2019-10-28 Pepijn de Vosactually run the gowin tests commit | commitdiff | tree
2019-10-28 Pepijn de VosMore formatting commit | commitdiff | tree
2019-10-28 Pepijn de Vosreally really fix formatting maybe commit | commitdiff | tree
2019-10-28 Pepijn de Vosundo formatting fuckup commit | commitdiff | tree
2019-10-28 Pepijn de Vosadd wide luts commit | commitdiff | tree
2019-10-28 Pepijn de Vosadd 32-bit BRAM and byte-enables commit | commitdiff | tree
2019-10-27 Clifford WolfMerge pull request #1393 from whitequark/write_verilog... commit | commitdiff | tree
2019-10-24 Pepijn de VosALU sim tweaks commit | commitdiff | tree
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