git.libre-soc.org Git - yosys.git/shortlog

2019-02-21	Eddie Hung	lut/not/and suffix to be ${lut,not,and}	commit \| commitdiff \| tree
2019-02-21	Eddie Hung	simple_abc9 tests to now preserve memories	commit \| commitdiff \| tree
2019-02-21	Eddie Hung	read_aiger to also rename 0 index lut when wideports	commit \| commitdiff \| tree
2019-02-21	Eddie Hung	Remove swap file	commit \| commitdiff \| tree
2019-02-20	Eddie Hung	write_aiger: fix CI/CO and symbols	commit \| commitdiff \| tree
2019-02-20	Eddie Hung	Move tests/techmap/abc9 to simple_abc9	commit \| commitdiff \| tree
2019-02-20	Eddie Hung	Add tests/simple_abc9	commit \| commitdiff \| tree
2019-02-20	Eddie Hung	abc9 to cope with multiple modules	commit \| commitdiff \| tree
2019-02-20	Eddie Hung	abc9 to use & syntax for -fast, and name fixes	commit \| commitdiff \| tree
2019-02-20	Eddie Hung	read_aiger: new naming fixes	commit \| commitdiff \| tree
2019-02-20	Eddie Hung	read_aiger to name wires with internal name, less likel...	commit \| commitdiff \| tree
2019-02-20	Eddie Hung	write_xaiger to not write latches, CO/PO fixes	commit \| commitdiff \| tree
2019-02-20	Eddie Hung	synth to take -abc9 argument	commit \| commitdiff \| tree
2019-02-20	Eddie Hung	abc9 to cope with indexed wires when creating $lut...	commit \| commitdiff \| tree
2019-02-19	Eddie Hung	Add a quick abc9 test	commit \| commitdiff \| tree
2019-02-19	Eddie Hung	Same for ascii AIGERs too	commit \| commitdiff \| tree
2019-02-19	Eddie Hung	read_aiger to cope with non-unique POs	commit \| commitdiff \| tree
2019-02-19	Eddie Hung	Merge branch 'master' into xaig	commit \| commitdiff \| tree
2019-02-19	Eddie Hung	Merge pull request #805 from eddiehung/dff_init	commit \| commitdiff \| tree
2019-02-19	Eddie Hung	abc9 to replace $_NOT_ with $lut	commit \| commitdiff \| tree
2019-02-19	Eddie Hung	read_aiger to create sane $lut names, and rename when...	commit \| commitdiff \| tree
2019-02-19	Eddie Hung	Add comment	commit \| commitdiff \| tree
2019-02-19	Eddie Hung	Get rid of boost dep, fix the FIXMEs for Win32?	commit \| commitdiff \| tree
2019-02-17	Eddie Hung	Instead of INIT param on cells, use initial statement...	commit \| commitdiff \| tree
2019-02-17	Eddie Hung	Revert "Add INIT parameter to all ff/latch cells"	commit \| commitdiff \| tree
2019-02-17	Eddie Hung	Merge https://github.com/YosysHQ/yosys into dff_init	commit \| commitdiff \| tree
2019-02-17	Clifford Wolf	Merge pull request #811 from ucb-bar/firrtlfixes	commit \| commitdiff \| tree
2019-02-17	Eddie Hung	Get rid of debugging stuff in abc9	commit \| commitdiff \| tree
2019-02-17	Eddie Hung	In read_xaiger, do not construct ConstEval for every LUT	commit \| commitdiff \| tree
2019-02-17	Eddie Hung	Cleanup	commit \| commitdiff \| tree
2019-02-17	Eddie Hung	read_aiger to ignore output = input of same wire; also...	commit \| commitdiff \| tree
2019-02-17	Eddie Hung	Cleanup	commit \| commitdiff \| tree
2019-02-17	Eddie Hung	write_xaiger to support non-bit cell connections, and...	commit \| commitdiff \| tree
2019-02-17	Eddie Hung	abc9 to write_aiger with -O option, and ignore dummy...	commit \| commitdiff \| tree
2019-02-17	Eddie Hung	write_aiger -O to write dummy output as __dummy_o__	commit \| commitdiff \| tree
2019-02-16	Eddie Hung	abc9 to handle comb loops, cope with constant outputs...	commit \| commitdiff \| tree
2019-02-16	Eddie Hung	read_aiger to disable log_debug	commit \| commitdiff \| tree
2019-02-16	Eddie Hung	expose command to not skip 'internal' wires beginning...	commit \| commitdiff \| tree
2019-02-16	Eddie Hung	read_xaiger() to use f.read() not readsome()	commit \| commitdiff \| tree
2019-02-16	Eddie Hung	abc9 to cope with non-wideports, count cells properly	commit \| commitdiff \| tree
2019-02-16	Eddie Hung	Tidy up write_xaiger	commit \| commitdiff \| tree
2019-02-16	Eddie Hung	write_aiger() to perform CI/CO post-processing and...	commit \| commitdiff \| tree
2019-02-16	Eddie Hung	read_aiger() to cope with constant outputs, mixed widep...	commit \| commitdiff \| tree
2019-02-15	Eddie Hung	Move lookup inside if	commit \| commitdiff \| tree
2019-02-15	Eddie Hung	Fixes needed for DFF circuits	commit \| commitdiff \| tree
2019-02-15	Eddie Hung	Refactor	commit \| commitdiff \| tree
2019-02-15	Eddie Hung	Cope with width != 1 when re-mapping cells	commit \| commitdiff \| tree
2019-02-15	Jim Lawson	Removed unused variables, functions.	commit \| commitdiff \| tree
2019-02-15	Jim Lawson	Append (instead of over-writing) EXTRA_FLAGS	commit \| commitdiff \| tree
2019-02-15	Eddie Hung	abc9 to stitch results with CI/CO properly	commit \| commitdiff \| tree
2019-02-15	Eddie Hung	read_aiger with more asserts, and call clean	commit \| commitdiff \| tree
2019-02-15	Eddie Hung	write_xaiger to cope with unknown cells by transforming...	commit \| commitdiff \| tree
2019-02-15	Jim Lawson	Update cells supported for verilog to FIRRTL conversion.	commit \| commitdiff \| tree
2019-02-14	Eddie Hung	More cleanup	commit \| commitdiff \| tree
2019-02-14	Eddie Hung	More cleanup of write_xaiger	commit \| commitdiff \| tree
2019-02-14	Eddie Hung	Get rid of formal stuff from xaiger backend	commit \| commitdiff \| tree
2019-02-14	Eddie Hung	synth_ice40 to have new -abc9 arg	commit \| commitdiff \| tree
2019-02-14	Eddie Hung	Leave FIXME for clean	commit \| commitdiff \| tree
2019-02-14	Eddie Hung	Use module->addLut()	commit \| commitdiff \| tree
2019-02-14	Eddie Hung	Fix stitching	commit \| commitdiff \| tree
2019-02-14	Eddie Hung	Use ConstEval to compute LUT masks	commit \| commitdiff \| tree
2019-02-13	Eddie Hung	Merge remote-tracking branch 'origin/read_aiger' into...	commit \| commitdiff \| tree
2019-02-13	Eddie Hung	Merge https://github.com/YosysHQ/yosys into xaig	commit \| commitdiff \| tree
2019-02-13	Eddie Hung	Rip out some more stuff	commit \| commitdiff \| tree
2019-02-13	Clifford Wolf	Fix sign handling of real constants	commit \| commitdiff \| tree
2019-02-13	Eddie Hung	Rip out unused functions in abc9	commit \| commitdiff \| tree
2019-02-12	Eddie Hung	Add support for read_aiger -wideports	commit \| commitdiff \| tree
2019-02-12	Eddie Hung	Add support for read_aiger -map	commit \| commitdiff \| tree
2019-02-12	Eddie Hung	Parse 'm' in xaiger	commit \| commitdiff \| tree
2019-02-12	Eddie Hung	WIP for ABC with aiger	commit \| commitdiff \| tree
2019-02-12	Eddie Hung	Missing headers for Xcode?	commit \| commitdiff \| tree
2019-02-12	Eddie Hung	Merge branch 'read_aiger' of github.com:eddiehung/yosys...	commit \| commitdiff \| tree
2019-02-12	Eddie Hung	Use module->add{Not,And}Gate() functions	commit \| commitdiff \| tree
2019-02-12	Clifford Wolf	Merge pull request #802 from whitequark/write_verilog_a...	commit \| commitdiff \| tree
2019-02-12	Clifford Wolf	Merge pull request #806 from daveshah1/fsm_opt_no_reset	commit \| commitdiff \| tree
2019-02-11	Eddie Hung	Add read_xaiger	commit \| commitdiff \| tree
2019-02-11	Eddie Hung	Add write_xaiger	commit \| commitdiff \| tree
2019-02-11	Eddie Hung	Do not break for constraints	commit \| commitdiff \| tree
2019-02-11	Eddie Hung	No increment line_count for binary ANDs	commit \| commitdiff \| tree
2019-02-11	Eddie Hung	Do not ignore newline after AND in binary AIG	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Copy backends/aiger/aiger.cc to xaiger.cc	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Merge remote-tracking branch 'origin/dff_init' into...	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Compile abc9	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Refactor kernel/cost.h definition into cost.cc	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Copy abc.cc to abc9.cc	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	addDff -> addDffGate as per @daveshah1	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Fix tabulation	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	-module_name arg to go before -clk_name	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Support and differentiate between ASCII and binary...	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Add missing "[options]" to read_blif help	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Allow module name to be determined by argument too	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Refactor into AigerReader class	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Parse binary AIG files	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Add binary AIGs converted from AAG	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Refactor to parse_aiger_header()	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Add comment	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Handle reset logic in latches	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Change literal vars from int to unsigned	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Create clk outside of latch loop	commit \| commitdiff \| tree
2019-02-08	Eddie Hung	Handle latch symbols too	commit \| commitdiff \| tree
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