yosys.git
2019-03-04 Kali PrasadAdded examples/anlogic/
2019-03-04 Clifford WolfImprove igloo2 example
2019-03-04 Clifford WolfUpdate igloo2 example to Libero v12.0
2019-03-03 Clifford WolfMerge pull request #848 from YosysHQ/clifford/fix763
2019-03-03 Clifford WolfMerge pull request #849 from YosysHQ/clifford/dynports
2019-03-02 Clifford WolfOnly run derive on blackbox modules when ports have...
2019-03-02 Clifford WolfFix error for wire decl in always block, fixes #763
2019-03-02 Clifford WolfFix $global_clock handling vs autowire
2019-03-02 Clifford WolfMerge pull request #847 from YosysHQ/clifford/fix785
2019-03-02 Clifford WolfFix $readmem[hb] for mem2reg memories, fixes #785
2019-03-02 Clifford WolfMerge pull request #843 from YosysHQ/clifford/mem2regco...
2019-03-02 Clifford WolfMerge pull request #845 from YosysHQ/clifford/travisnomacos
2019-03-02 Clifford WolfDisable macOS builds in Travis
2019-03-02 Larry DoolittleTry again for passes/pmgen/ice40_dsp_pm.h rule
2019-03-01 Clifford WolfMinor improvements in README
2019-03-01 Clifford WolfUse mem2reg on memories that only have constant-index...
2019-03-01 Clifford WolfFix "write_edif -gndvccy"
2019-03-01 Clifford WolfMerge pull request #841 from mmicko/master
2019-03-01 Miodrag MilanovicFix ECP5 cells_sim for iverilog
2019-03-01 Clifford WolfImprove "read" error msg
2019-03-01 Clifford WolfMerge pull request #836 from elmsfu/ice40_2bit_ram_rw_mode
2019-03-01 Clifford WolfHotfix for "make test"
2019-03-01 Clifford WolfMerge pull request #837 from YosysHQ/clifford/fix835
2019-03-01 Clifford WolfFix multiple issues in wreduce FF handling, fixes #835
2019-03-01 Elmsice40: use 2 bits for READ/WRITE MODE for SB_RAM map
2019-02-28 Clifford WolfMerge pull request #834 from YosysHQ/clifford/siminit
2019-02-28 Clifford WolfAdd "write_verilog -siminit"
2019-02-28 Larry DoolittleReduce amount of trailing whitespace in code base
2019-02-28 Clifford WolfFix pmgen for in-tree builds
2019-02-28 Clifford WolfMerge pull request #794 from daveshah1/ecp5improve
2019-02-28 Clifford WolfMerge pull request #827 from ucb-bar/firrtlfixes
2019-02-28 Clifford WolfFix pmgen for out-of-tree build
2019-02-28 Clifford WolfMerge pull request #833 from YosysHQ/clifford/fix831
2019-02-28 Clifford WolfFix smt2 code generation for partially initialized...
2019-02-28 Clifford WolfMerge pull request #832 from YosysHQ/supercover
2019-02-27 Clifford WolfImprovements in "supercover" pass
2019-02-27 Clifford WolfAdd "supercover" skeleton
2019-02-26 Larry Doolittletechlibs/greenpak4/cells_map.v: Harmonize whitespace...
2019-02-26 Larry DoolittleClean up some whitepsace outliers
2019-02-26 Jim LawsonFix FIRRTL to Verilog process instance subfield assignment.
2019-02-25 David Shahecp5: Compatibility with Migen AsyncResetSynchronizer
2019-02-24 Clifford WolfMinor changes ontop of 71bcc4c: Remove hierarchy warnin...
2019-02-24 Clifford WolfMerge pull request #812 from ucb-bar/arrayhierarchyfixes
2019-02-24 Clifford WolfCleanups in ARST handling in wreduce
2019-02-24 Clifford WolfMerge pull request #824 from litghost/fix_reduce_on_ff
2019-02-24 Clifford WolfFix handling of defparam for when default_nettype is...
2019-02-24 Clifford WolfCheck if Verific was built with DB_PRESERVE_INITIAL_VALUE
2019-02-23 Jim LawsonAddress requested changes - don't require non-$ name.
2019-02-22 Keith RothmanFix WREDUCE on FF not fixing ARST_VALUE parameter.
2019-02-22 Clifford WolfMerge pull request #819 from YosysHQ/clifford/optd
2019-02-22 Clifford WolfMerge pull request #820 from YosysHQ/clifford/fix810
2019-02-22 Clifford WolfMerge pull request #740 from daveshah1/improve_dress
2019-02-21 Clifford WolfFix Travis
2019-02-21 Clifford WolfHotfix for 4c82ddf
2019-02-21 Clifford WolfMerge pull request #822 from litghost/expand_setundef
2019-02-21 Keith RothmanAdd -params mode to force undef parameters in selected...
2019-02-21 Clifford WolfMerge pull request #818 from YosysHQ/clifford/dffsrfix
2019-02-21 Clifford WolfMerge pull request #786 from YosysHQ/pmgen
2019-02-21 Clifford WolfFix typo in passes/pmgen/README.md
2019-02-21 Clifford WolfMerge pull request #821 from eddiehung/dff_init
2019-02-21 Clifford WolfFixes related to handling of autowires and upto-ranges...
2019-02-21 Eddie HungRevert "Add -B option to autotest.sh to append to backe...
2019-02-21 Clifford WolfFix handling of expression width in $past, fixes #810
2019-02-21 Clifford WolfFix segfault in printing of some internal error messages
2019-02-21 Clifford WolfRename "yosys -U" to "yosys -P" to avoid confusion...
2019-02-21 Clifford WolfRename "yosys -D" to "yosys -U", add "yosys -D" with...
2019-02-21 Clifford WolfFix opt_rmdff handling of $_DFFSR_???_ and $_DLATCHSR_...
2019-02-21 Clifford WolfBugfix in ice40_dsp
2019-02-21 Eddie HungMerge pull request #817 from eddiehung/dff_init
2019-02-20 Eddie HungRemove simple_defparam tests
2019-02-20 Clifford WolfAdd ice40 test_dsp_map test case generator
2019-02-20 Clifford WolfAdd "synth_ice40 -dsp"
2019-02-20 Clifford WolfAdd FF support to wreduce
2019-02-20 Clifford WolfImprove iCE40 SB_MAC16 model
2019-02-20 Clifford WolfDetect and reject cases that do not map well to iCE40...
2019-02-19 Jim LawsonFix normal (non-array) hierarchy -auto-top.
2019-02-19 Eddie HungMerge pull request #805 from eddiehung/dff_init
2019-02-19 David Shahecp5: Add DDRDLLA
2019-02-19 David Shahecp5: Add DELAYF/DELAYG blackboxes
2019-02-19 Clifford WolfAdd first draft of functional SB_MAC16 model
2019-02-17 Eddie HungInstead of INIT param on cells, use initial statement...
2019-02-17 Eddie HungRevert "Add INIT parameter to all ff/latch cells"
2019-02-17 Eddie HungMerge https://github.com/YosysHQ/yosys into dff_init
2019-02-17 Clifford WolfAdd actual DSP inference to ice40_dsp pass
2019-02-17 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys into...
2019-02-17 Clifford WolfMerge pull request #811 from ucb-bar/firrtlfixes
2019-02-15 Jim LawsonRemoved unused variables, functions.
2019-02-15 Jim LawsonAppend (instead of over-writing) EXTRA_FLAGS
2019-02-15 Jim LawsonDefine basic_cell_type() function and use it to derive...
2019-02-15 Jim LawsonUpdate cells supported for verilog to FIRRTL conversion.
2019-02-13 Clifford WolfFix sign handling of real constants
2019-02-13 David Shahecp5: Add ECLKSYNCB blackbox
2019-02-12 Clifford WolfMerge pull request #802 from whitequark/write_verilog_a...
2019-02-12 Clifford WolfMerge pull request #806 from daveshah1/fsm_opt_no_reset
2019-02-12 David Shahecp5: Full set of IO-related blackboxes
2019-02-07 David Shahfsm_opt: Fix runtime error for FSMs without a reset...
2019-02-06 Eddie HungCope WIDTH of ff/latch cells is default of zero
2019-02-06 Eddie HungRemove check for cell->name[0] == '$'
2019-02-06 Eddie HungRefactor
2019-02-06 Eddie Hungwrite_verilog to cope with init attr on q when -noexpr
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