yosys.git
2019-05-07 Clifford WolfFix handling of partial init attributes in write_verilo...
2019-05-07 Clifford WolfMerge pull request #996 from mdaiter/ceil_log2_opts
2019-05-07 Matthew DaiterOptimize ceil_log2 function
2019-05-07 Clifford WolfAdd "synth_xilinx -arch"
2019-05-07 Clifford WolfMore opt_clean cleanups
2019-05-06 Clifford WolfMerge pull request #946 from YosysHQ/clifford/specify
2019-05-06 Clifford WolfMerge pull request #975 from YosysHQ/clifford/fix968
2019-05-06 Clifford WolfMerge pull request #871 from YosysHQ/verific_import
2019-05-06 Clifford WolfAdd tests/various/chparam.sh
2019-05-06 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys into...
2019-05-06 Clifford WolfFix the other bison warning in ilang_parser.y
2019-05-06 Clifford WolfBugfix in peepopt_shiftmul.pmg
2019-05-06 Clifford WolfMerge pull request #992 from bwidawsk/bison-fix
2019-05-06 Clifford WolfMerge pull request #989 from YosysHQ/dave/abc_name_improve
2019-05-06 Clifford WolfFix bug in "expose -input"
2019-05-06 Clifford WolfCleanups in opt_clean
2019-05-06 Clifford WolfImprove tests/various/specify.ys
2019-05-06 Clifford WolfAdd "real" keyword to ilang format
2019-05-06 Clifford WolfMerge branch 'master' of github.com:YosysHQ/yosys into...
2019-05-06 Ben Widawskyverilog_parser: Fix Bison warning
2019-05-04 Clifford WolfMerge pull request #988 from YosysHQ/clifford/fix987
2019-05-04 David Shahabc: Fix handling of postfixed names (e.g. for retiming)
2019-05-04 David Shahabc: Improve name recovery
2019-05-04 Clifford WolfImprove opt_clean handling of unused wires
2019-05-04 Clifford WolfAdd support for SVA "final" keyword
2019-05-04 Clifford WolfImprove write_verilog specify support
2019-05-04 Clifford WolfUpdate README
2019-05-04 Clifford WolfAdd approximate support for SV "var" keyword, fixes...
2019-05-03 Eddie HungMore testing
2019-05-03 Eddie HungFix spacing
2019-05-03 Eddie HungAdd quick-and-dirty specify tests
2019-05-03 Eddie HungMerge remote-tracking branch 'origin/master' into cliff...
2019-05-03 Eddie HungRename cells_map.v to prevent clash with ff_map.v
2019-05-03 Eddie Hungiverilog with simcells.v as well
2019-05-03 Clifford WolfAdd "hierarchy -chparam" support for non-verific top...
2019-05-03 Eddie Hunglog_warning_noprefix -> log_warning as per review
2019-05-03 Eddie HungFor hier_tree::Elaborate() also include SV root modules...
2019-05-03 Eddie HungFix verific_parameters construction, use attribute...
2019-05-03 Eddie HungWIP -chparam support for hierarchy when verific
2019-05-03 Eddie Hungverific_import() changes to avoid ElaborateAll()
2019-05-03 Clifford WolfMerge pull request #969 from YosysHQ/clifford/pmgenstuff
2019-05-03 Clifford WolfMerge pull request #984 from YosysHQ/eddie/fix_982
2019-05-03 Eddie HungRevert "synth_xilinx to call dffinit with -noreinit"
2019-05-03 Eddie HungIf init is 1'bx, do not add to dict as per @cliffordwolf
2019-05-03 Eddie HungRevert "dffinit -noreinit to silently continue when...
2019-05-03 Clifford WolfMerge pull request #976 from YosysHQ/clifford/fix974
2019-05-03 Clifford WolfMerge pull request #985 from YosysHQ/clifford/fix981
2019-05-03 Clifford WolfFix typo in tests/svinterfaces/runone.sh
2019-05-03 Clifford WolfMerge pull request #979 from jakobwenzel/svinterfacesTe...
2019-05-03 Clifford WolfImprove opt_expr and opt_clean handling of (partially...
2019-05-03 Clifford WolfFurther improve unused-detection for opt_clean driver...
2019-05-03 Clifford WolfImprove unused-detection for opt_clean driver-driver...
2019-05-03 Clifford WolfUpdate pmgen documentation
2019-05-03 Clifford WolfFix typo
2019-05-03 Eddie Hungsynth_xilinx to call dffinit with -noreinit
2019-05-03 Eddie Hungdffinit -noreinit to silently continue when init value...
2019-05-02 Jakob Wenzelfail svinterfaces testcases on yosys error exit
2019-05-02 Clifford WolfMerge pull request #963 from YosysHQ/eddie/synth_xilinx...
2019-05-02 Eddie HungMerge pull request #978 from ucb-bar/fmtfirrtl
2019-05-02 Eddie HungBack to passing all xc7srl tests!
2019-05-02 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2019-05-01 Eddie HungMerge branch 'master' of github.com:YosysHQ/yosys
2019-05-01 Jim LawsonRe-indent firrtl.cc:struct memory - no functional change.
2019-05-01 Clifford WolfMerge branch 'clifford/fix883'
2019-05-01 Clifford WolfAdd missing enable_undef to "sat -tempinduct-def",...
2019-05-01 Clifford WolfMerge pull request #977 from ucb-bar/fixfirrtlmem
2019-05-01 Jim LawsonFix #938 - Crash occurs in case when use write_firrtl...
2019-05-01 Clifford WolfFix floating point exception in qwp, fixes #923
2019-05-01 Clifford WolfAdd splitcmplxassign test case and silence splitcmplxas...
2019-05-01 Clifford WolfFix width detection of memory access with bit slice...
2019-05-01 Clifford WolfAdd additional test cases for for-loops
2019-05-01 Clifford WolfSilently resolve completely unused cell-vs-const driver...
2019-05-01 Clifford WolfRe-enable "final loop assignment" feature
2019-04-30 Clifford WolfFix segfault in wreduce
2019-04-30 Clifford WolfDisabled "final loop assignment" feature
2019-04-30 Clifford WolfMerge pull request #972 from YosysHQ/clifford/fix968
2019-04-30 Clifford WolfMerge pull request #966 from YosysHQ/clifford/fix956
2019-04-30 Clifford WolfMerge pull request #962 from YosysHQ/eddie/refactor_syn...
2019-04-30 Clifford WolfMerge branch 'master' into eddie/refactor_synth_xilinx
2019-04-30 Clifford WolfMerge pull request #973 from christian-krieg/feature...
2019-04-30 Clifford WolfInclude filename in "Executing Verilog-2005 frontend...
2019-04-30 Clifford WolfFix performance bug in RTLIL::SigSpec::operator==(...
2019-04-30 Clifford WolfAdd final loop variable assignment when unrolling for...
2019-04-30 Clifford WolfAdd handling of init attributes in "opt_expr -undriven"
2019-04-30 Benedikt TutzerMerge branch 'master' of https://github.com/YosysHQ...
2019-04-30 Benedikt TutzerCleaned up root directory
2019-04-30 Clifford WolfAdd peepopt_muldiv, fixes #930
2019-04-30 Clifford Wolfpmgen progress
2019-04-30 Clifford WolfRun "peepopt" in generic "synth" pass and "synth_ice40"
2019-04-30 Clifford WolfSome pmgen reorg, rename peepopt.pmg to peepopt_shiftmu...
2019-04-30 Clifford WolfProgress in shiftmul peepopt pattern
2019-04-29 Clifford WolfMerge pull request #960 from YosysHQ/eddie/equiv_opt_undef
2019-04-29 Clifford WolfMerge pull request #967 from olegendo/depfile_esc_spaces
2019-04-29 Clifford WolfAdd "peepopt" skeleton
2019-04-29 Clifford WolfAdd pmgen support for multiple patterns in one matcher
2019-04-29 Oleg Endofix codestyle formatting
2019-04-29 Clifford WolfSupport multiple pmg files (right now just concatenated...
2019-04-29 Oleg Endoescape spaces with backslash when writing dep file
2019-04-29 Clifford WolfDrive dangling wires with init attr with their init...
2019-04-28 Eddie HungCopy with 1'bx padding in $shiftx
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