gem5.git
2015-04-22 Brandon Pottersyscall_emul: update getrlimit to use warn
2015-04-22 Brandon Pottersyscall_emul: fix warning with wrong syscall name
2015-04-22 Brandon Potterbase: add new ChunkGenerator method to identify last...
2015-04-20 Steve Reinhardtstats: update a few stats from long O3 runs
2015-04-20 Andreas Hanssoncpu: Remove the InOrderCPU from the tree
2015-04-20 Andreas Hanssonconfig: Remove memory aliases and rely on class name
2015-04-15 Nilay VaishAdded tag stable_2015_04_15 for changeset e17949745150
2015-04-14 Nilay Vaishstats: x86: changes due to recent patches
2015-04-14 Malek Muslehconfig, cpu: fix progress interval for switched CPUs
2015-04-13 Dibakar Gopecpu: re-organizes the branch predictor structure.
2015-04-13 Nilay Vaishx86: implements x87 mult/div instructions
2015-04-13 Lena Olsonruby: allow restoring from checkpoint when using DRAMCtrl
2015-04-13 Nilay Vaishsim: Use NULL instead of None for testing filenames.
2015-04-13 Nilay Vaishsim: fix function for emulating dup()
2015-04-08 Curtis Dunhamconfig: Support full-system with SST's memory system
2015-04-08 Curtis Dunhamext: Add SST connector
2015-04-03 Nilay Vaishstats: updates due to recent changesets.
2015-04-03 Nikos Nikolerisdev: (un)serialize fix for the RTC and RTC Timer Interr...
2015-04-03 Ruslan Bukinsim: correct check for endianess
2015-04-03 Ruslan Bukindev: Extend access width for IDE control registers
2015-04-03 Nikos Nikoleriscpu: fix system total instructions accounting
2015-04-03 Lena Olsonx86: fix debug trace output for mwait
2015-03-27 Andreas Hanssonarm, configs: Do not forward snoops from I cache
2015-03-27 Stephan Diestelhorstmem: Support any number of master-IDs in stride prefetcher
2015-03-27 Andreas Hanssonmem: Allocate cache writebacks before new MSHRs
2015-03-27 Andreas Hanssonmem: Cleanup flow for uncacheable accesses
2015-03-27 Andreas Hanssonmem: Ignore uncacheable MSHRs when finding matches
2015-03-27 Andreas Hanssonmem: Remove redundant allocateUncachedReadBuffer in...
2015-03-27 Andreas Hanssonmem: Modernise MSHR iterators to C++11
2015-03-27 Andreas Hanssontests: Update stats for cache block alignment
2015-03-27 Andreas Hanssonmem: Align all MSHR entries to block boundaries
2015-03-27 Ali Jafrimem: Rename PREFETCH_SNOOP_SQUASH flag to BLOCK_CACHED
2015-03-26 Curtis Dunhamsim: Update limit_event reuse to final version
2015-03-26 Andreas Hanssoncpu: Fix InstPBTrace inheritance
2015-03-23 Steve Reinhardtmem: rename Locked/LOCKED to LockedRMW/LOCKED_RMW
2015-03-23 Steve Reinhardtconfig: expand '~' and '~user' in paths
2015-03-23 Steve Reinhardtmisc: quote args in echoed command line
2015-03-23 Curtis Dunhamconfig: Add ability to exit simulation after initialization
2015-03-23 Curtis Dunhamsim: Reuse the same limit_event in simulate()
2015-03-23 Andreas Hanssonmem: Tidy up Request
2015-03-23 Andreas Hanssontests: Final reclassification of quick regressions
2015-03-19 Steve Reinhardtstats: update Minor stats due to PF bug fix
2015-03-19 Andreas Hanssontests: Recategorise regressions based on run time
2015-03-19 Andreas Sandbergtest, arm: Add scripts to test checkpoints
2015-03-19 Andreas Hanssonconfig: Add soak test for memtest.py
2015-03-19 Matt Evansarm: Add a GICv2m device
2015-03-19 Matt Evansarm: Remove the 'magic MSI register' in the GIC (PL390)
2015-03-19 Chris Emmonsconfig: Specify OS type and release on command line
2015-03-19 Wendy Elsassercpu: Fix TrafficGen message format
2015-03-19 Andreas Hanssonmem: Use emplace front/back for deferred packets
2015-03-19 Geoffrey Blakemem: Enable CommMonitor to output traces in atomic...
2015-03-19 Andreas Hanssonconfig: Fix DRAM rank option in sweep script
2015-03-19 Andreas Hanssontests: Bump timeout to 5 hours
2015-02-11 Steve Reinhardtmem: remove redundant test in in Cache::recvTimingResp()
2015-02-11 Steve Reinhardtmem: add local var in Cache::recvTimingResp()
2015-02-11 Steve Reinhardtmem: restructure Packet cmd initialization a bit more
2015-03-14 Steve Reinhardtmem: clean up write buffer check in Cache::handleSnoop()
2015-03-09 Nilay Vaishtests: remove not maintained 20.eio-short detailed...
2015-03-09 Nilay Vaishstats: changes to due to recent set of patches
2015-03-09 Rizwana Begumconfig: Fix for 'android' lookup in disk name
2015-03-09 Nilay Vaishcpu: o3: another assert instead of check
2015-03-09 Nilay Vaishcpu: o3: Remove unused code in iew, add assert instead.
2015-03-09 Nilay Vaishcpu: o3: commit: mark pipeline delay variable as consts
2015-03-09 Nilay Vaishcpu: o3: remove unused stat variables.
2015-03-09 Nilay Vaishcpu: o3: combine if with same condition
2015-03-09 Nilay Vaishcpu: o3: remove member variable squashCounter
2015-03-09 Nilay Vaishcpu: o3: remove unused function annotateMemoryUnits()
2015-03-07 Steve Reinhardtstats: update eio stats
2015-03-02 Andreas Hanssonstats: Update stats to reflect cache and interconnect...
2015-03-02 Andreas Hanssonmem: Unify all cache DPRINTF address formatting
2015-03-02 Andreas Hanssonmem: Fix cache MSHR conflict determination
2015-03-02 Andreas Hanssonmem: Add byte mask to Packet::checkFunctional
2015-03-02 Stephan Diestelhorstmem: Add option to force in-order insertion in PacketQueue
2015-03-02 Marco Balbonimem: Downstream components consumes new crossbar delays
2015-03-02 Andreas Hanssonmem: Move crossbar default latencies to subclasses
2015-03-02 Marco Balbonimem: Add crossbar latencies
2015-03-02 Andreas Sandbergdev, arm: Clean up PL011 and rewrite interrupt handling
2015-03-02 Andreas Hanssonarm: Share a port for the two table walker objects
2015-03-02 Giacomo Gabrielliarm: Remove unnecessary dependencies between AArch64...
2015-03-02 Rekaicpu: o3 register renaming request handling improved
2015-03-02 Andreas Hanssonmem: Tidy up the cache debug messages
2015-03-02 Andreas Hanssonmem: Split port retry for all different packet classes
2015-03-02 Ali Jafrimem: Fix prefetchSquash + memInhibitAsserted bug
2015-03-02 Stephan Diestelhorstcpu: Add a PC-value to the traffic generator requests
2015-03-02 Andreas Hanssontests: Run regression timeout as foreground
2015-03-02 Andreas Sandbergarm: Don't truncate 16-bit ASIDs to 8 bits
2015-03-02 Andreas Sandbergarm: Correctly access the stack pointer in GDB
2015-03-02 Andreas Sandbergarm: Fix broken page table permissions checks in remote GDB
2015-02-26 Jason PowerRuby: Update backing store option to propagate through...
2015-02-16 Andreas Hanssonconfig: Add memcheck stress test
2015-02-16 Andreas Hanssoncpu: TrafficGen sinks snoops without complaining
2015-02-16 Stephan Diestelhorstmem: Fix initial value problem with MemChecker
2015-02-16 Andreas Hanssondev: Fix undefined behaviuor in i8254xGBe
2015-02-16 Andreas Sandbergarm: Wire up the GIC with the platform in the base...
2015-02-16 Andreas Hanssonmem: mmap the backing store with MAP_NORESERVE
2015-02-16 Andreas Hanssonmem: Use the range cache for lookup as well as access
2015-02-16 Andreas Hanssonarch: Make readMiscRegNoEffect const throughout
2015-01-16 Curtis Dunhamconfig: add --root-device machine parameter
2015-02-16 Andreas Sandbergarm: Merge ISA files with pseudo instructions
2015-02-16 Ali Saidicpu: add support for outputing a protobuf formatted...
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