microwatt.git
2022-03-28 Tobias Platenadd read_verilog when using external core
2022-03-27 Tobias Platenmore work on verilator backport
2022-03-27 Tobias Platenbegin verilator_trace backport
2022-03-24 Tobias Platentry using plru_dummy.vhdl
2022-03-23 Tobias Platenpartial synthesize with EXTERNAL_CORE
2022-03-23 Tobias Platenallow using external core
2022-03-22 Tobias PlatenMerge remote-tracking branch 'to-be-merged/merge-3d... merge-3d-game
2022-03-22 Michael NeulingMerge pull request #361 from antonblanchard/alt-reset...
2022-03-21 Anton BlanchardAllow ALT_RESET_ADDRESS to be overridden
2022-03-18 Michael NeulingMerge pull request #360 from antonblanchard/log2ceil...
2022-03-17 Anton Blanchardwishbone_bram_wrapper ram_addr_bits is 1 bit off
2022-03-15 Michael NeulingMerge pull request #358 from antonblanchard/unused-sig
2022-03-15 Michael NeulingMerge pull request #356 from antonblanchard/fpu-constant
2022-03-15 Michael NeulingMerge pull request #357 from antonblanchard/xics-warning
2022-03-15 Anton BlanchardRemove unused sequential signal from Fetch1ToIcacheType
2022-03-15 Anton Blanchardxics: Fix warning when comparing two std_ulogic_vectors
2022-03-15 Anton Blanchardfpu: Make inverse_table a constant
2022-03-04 Jacob Lifshayadd 3d game
2022-03-04 Matt JohnstonMakefile: Don't force generic USE_LITEDRAM=true
2022-03-04 Matt Johnstonvalentyusb: Add software for liteuart console
2022-03-04 Matt Johnstonvalentyusb: Add USB UART to SOC and OrangeCrab
2022-03-04 Matt JohnstonMakefile: depend on soc_extra_v
2022-02-27 Michael NeulingMerge pull request #352 from mkj/static-urjtag
2022-02-25 Matt Johnstonmw_debug: Add STATIC_URJTAG flag
2022-02-25 Michael NeulingUpdate the README Issues (#350)
2022-02-25 Michael NeulingMerge pull request #349 from madscientist159/master
2022-02-23 Raptor Engineering... Extend LiteDRAM VHDL wrapper to allow more than one...
2022-02-23 Michael NeulingMerge pull request #348 from paulusmack/reduce
2022-02-21 Paul Mackerrasxics: Rework the irq_gen process
2022-02-21 Paul MackerrasUse alternative count-leading-zeroes algorithm in the...
2022-02-20 Paul Mackerrascountzero: Use alternative algorithm for higher bits
2022-02-13 Paul Mackerrassoc: Re-do peripheral address decode to improve timing
2022-02-07 Michael NeulingMerge pull request #346 from mkj/dmi_ecp5
2022-02-07 Anton BlanchardMerge pull request #343 from mikey/orange-crab-ci
2022-02-07 Matt Johnstonmw_debug: Add Lattice ECP5 support
2022-02-04 Matt Johnstondmi_dtm_ecp5: Use ECP5 JTAGG for DMI
2022-02-04 Matt Johnstonmw_debug: Link urjtag statically
2022-02-04 Matt Johnstonmw_debug: use isxdigit for hex arguments
2022-02-04 Matt Johnstonmw_debug: Add -s frequency argument
2022-02-04 Matt Johnstonmw_debug: pass target parameters to urjtag
2022-02-04 Paul Mackerrasfetch1/icache1: Remove the use_previous logic
2022-02-04 Paul MackerrasMerge pull request #345 from antonblanchard/popcnt...
2022-02-02 Paul Mackerrascore: Make popcnt* take two cycles
2022-01-18 Michael Neulingci: Add new Orange Crab build
2022-01-18 Michael NeulingMerge pull request #342 from mkj/orangecrab-merge
2022-01-18 Michael NeulingMerge branch 'master' into orangecrab-merge
2022-01-18 Michael NeulingMerge pull request #341 from mkj/progtools
2022-01-18 Michael NeulingMerge pull request #340 from mkj/orangecrab-ghdl-plugin
2022-01-17 Matt Johnstonorangecrab: Fix sdcard wishbone addressing
2022-01-17 Matt Johnstonorangecrab: use litesdcard
2022-01-17 Matt Johnstonlitesdcard: add lattice, regenerate
2022-01-17 Matt Johnstonorangecrab: No BTC, LOG_LENGTH, dram NUM_LINES
2022-01-17 Matt Johnstonorangecrab: Use litedram
2022-01-17 Matt Johnstonorangecrab: set HAS_SHORT_MULT
2022-01-17 Matt Johnstonorangecrab: add Orange Crab r0.2 target
2022-01-14 Matt Johnstonlitedram: Add orangecrab-85-0.2 target
2022-01-14 Matt Johnstonlitedram: set Makefile -Werror
2022-01-14 Matt Johnstonlitedram: disable block_until_ready, regenerate
2022-01-13 Matt JohnstonMakefile: add ecpprog targets
2022-01-13 Matt JohnstonMakefile: Add DFU programming
2022-01-13 Matt JohnstonMakefile: detect when ghdl is a yosys plugin
2022-01-08 Anton BlanchardMerge pull request #338 from shenki/yosys-read-verilog
2021-12-21 Joel StanleyMakefile: Use read_verilog with yosys
2021-10-25 Michael NeulingMerge pull request #337 from paulusmack/fixes
2021-10-16 Paul MackerrasECP5: Adjust PLL constants so the PLL lock indication...
2021-10-13 Michael NeulingMerge pull request #336 from paulusmack/fixes
2021-10-12 Paul MackerrasMakefile: Add a target for the Orange Crab v0.21 with...
2021-09-27 Michael NeulingMerge pull request #334 from antonblanchard/icbi-issue
2021-09-27 Anton BlanchardMerge pull request #335 from ozbenh/misc
2021-09-27 Benjamin Herrenschmidticache: req_laddr becomes req_raddr
2021-09-27 Benjamin HerrenschmidtIntroduce addr_to_wb() and wb_to_addr() helpers
2021-09-27 Benjamin HerrenschmidtIntroduce real_addr_t and addr_to_real()
2021-09-27 Anton Blanchardtests/misc: Add a store/dcbz test
2021-09-27 Anton Blanchardtests/misc: Add an icbi test
2021-09-27 Anton BlanchardMerge pull request #333 from ozbenh/wukong
2021-09-25 Benjamin HerrenschmidtRegenerate litedram and liteeth
2021-09-25 Benjamin HerrenschmidtAdd support for QMTech Wukong v2 board
2021-09-25 Benjamin Herrenschmidtfpga/clk_gen_plle2: Add support for 50Mhz->100Mhz
2021-09-25 Benjamin HerrenschmidtAdd support for more spansion flash
2021-09-25 Anton BlanchardMerge pull request #332 from paulusmack/fixes
2021-09-25 Paul Mackerrasdcache: Fix bug with dcbz closely following stores...
2021-09-25 Paul Mackerrasicache: Fix icache invalidation
2021-09-25 Paul Mackerrasdecode1: Conditional trap instructions don't need to...
2021-09-24 Paul MackerrasMerge pull request #330 from antonblanchard/orange...
2021-09-24 Anton BlanchardMerge pull request #331 from ozbenh/misc
2021-09-24 Benjamin HerrenschmidtAdd liteeth/build to gitignore
2021-09-24 Benjamin Herrenschmidtmw_debug: Default to jtag backend if unspecified
2021-09-24 Benjamin Herrenschmidtmw_debug: Probe cable if unspecified
2021-09-24 Benjamin Herrenschmidtflash-arty: Add cable argument
2021-09-24 Anton BlanchardMerge pull request #329 from paulusmack/wb-fix
2021-09-24 Anton BlanchardOrange Crab is 48MHz not 50MHz, bump PLL frequency
2021-09-16 Michael NeulingMerge pull request #328 from paulusmack/shortmult
2021-09-16 Michael NeulingMerge pull request #327 from paulusmack/master
2021-09-15 Paul MackerrasMake wishbone addresses be in units of doublewords...
2021-09-15 Paul Mackerrascore: Add a short multiplier
2021-09-14 Paul Mackerrasloadstore1: Make r1.req.addr not depend on l_in.valid
2021-09-13 Michael NeulingMerge pull request #324 from paulusmack/master
2021-09-11 Paul Mackerrascore: Predict not-taken conditional branches using BTC
2021-09-11 Paul Mackerrasxilinx-mult: Move some registers later in the data...
2021-09-11 Paul MackerrasMerge pull request #326 from antonblanchard/dcache...
next