yosys.git
2016-09-04 Clifford WolfMinor bugfix in write_smt2
2016-09-03 Clifford WolfMinor README updates
2016-09-03 Clifford WolfAdded boolector support to yosys-smtbmc
2016-09-02 Clifford WolfMerge branch 'smtbmc-kmanfi'
2016-09-02 Clifford WolfMade examples/smtbmc/demo1.v more interesting
2016-09-02 Clifford WolfDon't re-create hex_dict for each value
2016-09-02 Kaj TuomiMore PEP 8 fixes.
2016-09-02 Kaj TuomiIndentation and PEP 8 fixes. CamelCase and white space...
2016-09-02 Kaj TuomiUse dict lookup instead of many ifs.
2016-09-02 Kaj TuomiFix: Unresolved reference.
2016-09-02 Kaj TuomiSome syntax fixes. Generator and comma separated list...
2016-08-30 Clifford WolfAdded "prep -nomem"
2016-08-30 Clifford WolfAdded $anyconst support to yosys-smtbmc
2016-08-30 Clifford WolfRemoved $aconst cell type
2016-08-30 Clifford WolfFixed memory bug in write_smt2
2016-08-30 Clifford WolfMade "write_smt2 -bv -mem" default, added "write_smt2...
2016-08-30 Clifford WolfAdded $anyconst support to smt2 back-end
2016-08-29 Clifford WolfImproved init spec handling in opt_rmdff, modernized...
2016-08-29 Clifford WolfAdded "yosys-smtbmc --dump-all"
2016-08-29 Clifford WolfMore yosys-smtbmc bugfixes
2016-08-29 Clifford WolfVarious fixes and improvements in yosys-smtbmc
2016-08-28 Clifford WolfRemoved $predict again
2016-08-28 Clifford WolfImproved "show" help message
2016-08-27 Clifford WolfSome changes to yosys-smtbmc cmd line options, add...
2016-08-27 Clifford WolfFixed handling of transparent bram rd ports on ROMs
2016-08-27 Clifford WolfAdded smtc "final" statement
2016-08-26 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2016-08-26 Clifford WolfMerge pull request #215 from frznchckn/to_upstream
2016-08-26 Clifford WolfAdded read_verilog -norestrict -assume-asserts
2016-08-26 Russell L FriesenhahnRelax test to see if yosys dir is a git repository...
2016-08-26 Russell L FriesenhahnAllow redefining of the ABC repository URL
2016-08-26 Clifford WolfVarious fixes and improvements in smt2 back-end
2016-08-25 Clifford WolfImproved verilog parser errors
2016-08-24 Clifford WolfMore yosys-smtbmc smtc features
2016-08-24 Clifford Wolfyosys-smtbmc --smtc -g
2016-08-24 Clifford WolfAdded SV "restrict" keyword
2016-08-22 Clifford WolfMinor yosys-smtbmc bugfix
2016-08-22 Clifford WolfAdded "yosys-smtbmc --constr"
2016-08-22 Clifford WolfAdded "yosys-smtbmc --dump-constr"
2016-08-22 Clifford WolfAdded glob support to all front-ends
2016-08-22 Clifford WolfFixed bug with memories that do not have a down-to...
2016-08-22 Clifford WolfFixed bug in memory_share for memory ports with differe...
2016-08-21 Clifford Wolfyosys-smtbmc: improved --dump-vlogtb handling of memories
2016-08-21 Clifford WolfAdded another mem2reg test case
2016-08-21 Clifford WolfAnother bugfix in mem2reg code
2016-08-21 Clifford WolfMinor improvements to AstNode::dumpAst() and AstNode...
2016-08-20 Clifford WolfAdded examples/smtbmc/demo2.v
2016-08-20 Clifford WolfAdded "yosys-smtbmc --dump-vlogtb"
2016-08-20 Clifford WolfAdded support for memories to smtio.py
2016-08-20 Clifford WolfDeprecated "write_smt2 -regs" (by default on now),...
2016-08-20 Clifford WolfAdded "yosys-smtbmc -g"
2016-08-20 Clifford WolfAdded smtbmc longopt support
2016-08-20 Clifford WolfFixed finish_addr handling in $readmemh/$readmemb
2016-08-20 Clifford WolfBugfix in partial mem write handling in verilog back-end
2016-08-20 Clifford WolfAdded "wreduce -memx"
2016-08-19 Clifford WolfAdded memory_memx pass, "memory -memx", and "prep ...
2016-08-19 Clifford WolfOptimize memory address port width in wreduce and memor...
2016-08-18 Clifford WolfAdded missing support for mem read enable ports to...
2016-08-18 Clifford WolfBugfix in test_autotb
2016-08-18 Clifford WolfImproved smtbmc vcd generation performance
2016-08-17 Clifford WolfAdded printing of code loc of failed asserts to yosys...
2016-08-16 Clifford WolfFixed default build config
2016-08-16 Clifford WolfMerge pull request #203 from cr1901/master
2016-08-16 William D.... Add MSYS2-compatible build.
2016-08-16 Clifford WolfUse _Exit(0) on win32, always use _Exit(1) in log_error()
2016-08-16 Clifford WolfUpdated ABC to hg rev a86455b00da5
2016-08-16 Clifford WolfFixed use-after-free dict<> usage pattern in hierarchy.cc
2016-08-15 Clifford WolfUpdated ABC to hg rev 760ba358e790
2016-08-15 Clifford WolfABC mxe cross-build fix
2016-08-15 Clifford WolfMinor fixes in show command
2016-08-15 Clifford WolfAdded greenpak4_dffinv
2016-08-15 Clifford WolfFixed upto handling in verilog back-end
2016-08-14 Clifford WolfMerge pull request #200 from azonenberg/master
2016-08-14 Andrew Zonenberggreenpak4: Changed name of inverted output ports for...
2016-08-14 Andrew Zonenberggreenpak4: Added GP_DFFxI cells
2016-08-14 Andrew Zonenberggreenpak4: Renamed ports for better consistency (see...
2016-08-11 Clifford WolfMerge pull request #198 from whitequark/master
2016-08-10 whitequarksynth_greenpak4: use attrmvcp to move LOC from wires...
2016-08-10 Clifford WolfOnly allow posedge/negedge with 1 bit wide signals
2016-08-10 Clifford WolfFixed some compiler warnings in attrmap command
2016-08-09 Clifford WolfAdded "attrmap" command
2016-08-09 Clifford WolfAdded log_const() API
2016-08-09 Clifford WolfAdded "attrmvcp" pass
2016-08-08 Yury GribovUse /proc/self/exe on Cygwin as well.
2016-08-08 Clifford WolfUndo "preserve wire attributes in iopadmap" change...
2016-08-06 Clifford WolfAdded "test_autotb -seed" (and "autotest.sh -S")
2016-08-06 Clifford Wolfpreserve wire attributes in iopadmap
2016-08-06 Clifford WolfFixed bug in parsing real constants
2016-08-02 Clifford WolfAdded "insbuf" command
2016-07-30 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2016-07-30 Clifford WolfAdded "write_verilog -defparam"
2016-07-30 Clifford WolfAdded "write_verilog -nodec -nostr"
2016-07-27 Clifford WolfAdded $initstate support to smtbmc flow
2016-07-27 Clifford WolfAdded SatGen support for $anyconst
2016-07-27 Clifford WolfRemoved $predict support from SatGen
2016-07-27 Clifford WolfAdded $anyconst and $aconst
2016-07-27 Clifford WolfAdded "read_verilog -dump_rtlil"
2016-07-25 Clifford WolfRenamed AbstractCellEdgesDatabase::add_cell() to add_ed...
2016-07-25 Clifford WolfFixed a verilog parser memory leak
2016-07-25 Clifford WolfFixed parsing of empty positional cell ports
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