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gem5.git
2019-05-02
Giacomo Travaglini
dev-arm: Add named variable for GICD_TYPER.IDBits
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2019-05-02
Giacomo Travaglini
dev-arm: Read correct version of ICC_BPR register
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2019-05-02
Giacomo Travaglini
dev-arm: Get a Gicv3Redistributor ptr from phys address
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2019-05-02
Giacomo Travaglini
dev-arm: Add several LPI methods in Gicv3Redistributor
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2019-05-02
Giacomo Travaglini
dev-arm: Take LPIs into account when interacting with...
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2019-05-02
Giacomo Travaglini
dev-arm: Fix GICv3 LPIs priority value
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2019-05-02
Giacomo Travaglini
dev-arm: Disable LPI Configuration Table caching
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2019-05-02
Giacomo Travaglini
dev-arm: Check EnableLPIs before checking for pending...
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2019-05-02
Giacomo Travaglini
dev-arm: GICv3 LPI tables are using physical addresses
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2019-05-02
Giacomo Travaglini
dev-arm: Fix GICv3 LPI loop
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2019-05-02
Giacomo Travaglini
dev-arm: Fix Bitwise operation in GICv3
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2019-05-02
Daniel R. Carvalho
tests: Add missing kernels to system creation
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2019-04-30
Gabe Black
arch: Stop using TheISA within the ISAs.
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2019-04-30
Gabe Black
x86: Get rid of some unnecessary TheISA-es in x86.
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2019-04-30
Gabe Black
sparc: Move translation constants from isa_traits.hh...
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2019-04-30
Gabe Black
sparc: Move the interrupt types out of isa_traits.hh...
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2019-04-30
Gabe Black
arch: Remove the mt.hh switching header.
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2019-04-30
Gabe Black
cpu: alpha: Delete all occurrances of the simPalCheck...
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2019-04-30
Gabe Black
alpha: Implement simPalCheck within the ISA description.
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2019-04-30
Gabe Black
cpu: Remove hwrei from the generic interfaces.
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2019-04-30
Alexandru Dutu
sim-se: use DPRINTF_SYSCALL for ioctl/wait4
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2019-04-30
Brandon Potter
sim-se: bugfix for 54c77aa055e
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2019-04-30
Gabe Black
arch: cpu: Track kernel stats using the base ISA agnost...
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2019-04-30
Gabe Black
alpha: Implement HWREI in the ISA.
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2019-04-30
Gabe Black
alpha: Add some control registers to the ISA operands...
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2019-04-30
Brandon Potter
sim-se: add socket ioctls
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2019-04-30
Gabe Black
systemc: Add a distinct async_request_update mechanism.
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2019-04-29
Gabe Black
cpu: Get rid of the (read|set)RegOtherThread methods.
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2019-04-29
Gabe Black
mips: Implement readRegOtherThread and setRegOtherThrea...
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2019-04-29
Gabe Black
cpu: Include debug flags regardless of whether the...
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2019-04-29
Steve Reinhardt
sim-se: create Proc out files in out dir
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2019-04-29
Giacomo Travaglini
arch-arm: Faults DebugFlag now printing inst opcode...
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2019-04-29
Giacomo Travaglini
arch-arm: Report real instruction encoding when Undefined
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2019-04-28
Gabe Black
arch, sim: Simplify the AuxVector type.
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2019-04-28
Gabe Black
mem: Remove the ISA specialized versions of port proxy...
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2019-04-28
Gabe Black
mem: Minimize the use of MemObject.
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2019-04-27
Gabe Black
python: Get rid of the VectorPort constructor.
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2019-04-27
Gabe Black
python: Replace the Master/Slave Ports with Request...
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2019-04-26
Giacomo Travaglini
arch-arm: updateMiscReg not setting isHyp in aarch64
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2019-04-26
Gabe Black
arm: Factor some repetition out of the ProcessInfo...
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2019-04-25
Gabe Black
arm: Fix some style issues in stacktrace.cc.
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2019-04-25
Gabe Black
x86: Refactor the ProcessInfo constructor.
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2019-04-25
David Hashe
configs: faux-filesystem fix w/ ruby in se mode
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2019-04-25
Gabe Black
x86: Fix some style issues in stacktrace.cc.
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2019-04-25
David Hashe
sim-se: add a faux-filesystem
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2019-04-25
Giacomo Travaglini
arch-arm: Remove un-needed hyp flag in TLBI operations
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2019-04-25
Giacomo Travaglini
arch-arm: Correct target EL field in TLBI operations
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2019-04-25
Giacomo Travaglini
dev-arm: Move GICv3 (Re)Ditributor address in Realview.py
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2019-04-25
Giacomo Travaglini
dev-arm: Limit number of max PE in GICv3 to 128
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2019-04-25
Giacomo Travaglini
dev-arm: Add GICv4 extension switch in GICv3
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2019-04-25
Giacomo Travaglini
dev-arm: Check for maximum number of supported PE in...
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2019-04-24
Javier Bueno
config: Add flag options to set the hardware prefetcher...
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2019-04-24
Andrea Mondelli
cpu,mem: missing override specifier
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2019-04-24
Gabe Black
systemc: Use the new TLM socket types in the TLM bridge...
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2019-04-24
Gabe Black
systemc: Add Port types for initiator and target sockets.
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2019-04-24
Gabe Black
dev: Use the new Port role mechanism to make an EtherIn...
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2019-04-24
Gabe Black
python: Generalize the Port.splice function.
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2019-04-24
Gabe Black
python: Generalize the dot_writer to handle non Master...
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2019-04-24
Gabe Black
python: Make Port roles a more generic concept.
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2019-04-23
Ciro Santilli
python: fix tracing after Python 3 refactor
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2019-04-22
Alexandru Dutu
sim-se: Enhance clone for X86KvmCPU
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2019-04-22
Daniel
mem-cache: Fix fix of replacement count
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2019-04-22
Gabe Black
cpu: Eliminate the ProxyThreadContext class.
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2019-04-22
Po-Hao Su
configs: Use param to get number of processors
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2019-04-19
Daniel R. Carvalho
mem-cache: Fix increasing replacement count
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2019-04-19
Daniel R. Carvalho
mem-cache: Remove blk_addr from Queue::trySatisfyFunctional
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2019-04-19
Daniel R. Carvalho
mem-cache: Add match functions to QueueEntry
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2019-04-19
Daniel R. Carvalho
mem: Add packet matching functions
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2019-04-19
Daniel R. Carvalho
mem-cache: Move Target to QueueEntry
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2019-04-19
Daniel R. Carvalho
mem-cache: Assert Entry inherits from QueueEntry in...
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2019-04-19
Daniel R. Carvalho
mem: Make DRAMCtrl::decodeAddr const
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2019-04-19
Daniel R. Carvalho
mem: Allow packet to provide its own addr range
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2019-04-16
Andrea Mondelli
mem: missing override specifier
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2019-04-14
Gabe Black
mem: Teach SimpleMem to return a MemBackdoor when appro...
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2019-04-14
Gabe Black
mem: Maintain a back door into the AbstractMem's backin...
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2019-04-12
Rutuja Oza
tests: Add tests for learning_gem5 configs
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2019-04-12
Jason Lowe...
tests: Add protocol as an option to SconsFixture
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2019-04-12
Hoa Nguyen
tests: add riscv to cpu tests
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2019-04-11
Anis Peysieux
mem-cache: Fix RRPV for RRIP
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2019-04-11
Giacomo Travaglini
arch-arm: Enable PMSELR_EL0 read in PMU
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2019-04-10
Gabe Black
mem: Plumb backdoor requests through the xbar classes.
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2019-04-10
Gabe Black
systemc: Teach the TLM bridges how to use gem5's new...
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2019-04-10
Gabe Black
mem: Add sendAtomicBackdoor/recvAtomicBackdoor port...
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2019-04-10
Nikos Nikoleris
mem-cache: Fix MSHR handling of cache clean requests
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2019-04-10
Giacomo Travaglini
cpu: O3 switchFreeList checking VecElems instead of...
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2019-04-08
Jason Lowe...
learning_gem5,configs: Update ruby_test
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2019-04-08
Jason Lowe...
learning_gem5: Fix vector port panic in SimpleCache
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2019-04-08
Jason Lowe...
configs: Fix import path error in learning_gem5 part3
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2019-04-08
Jason Lowe...
configs: Add full path for learning_gem5 binaries
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2019-04-08
Ryan Gambord
configs: Removed redudant exec-style import
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2019-04-06
Gabe Black
mem: Add a MemBackdoor type to track memory backdoors.
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2019-04-05
Nikos Nikoleris
cpu: Correctly account for executed instructions in...
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2019-04-05
Ryan Gambord
mem-cache: ambiguous use of abs function
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2019-04-05
Jason Lowe...
mem: Reverse order of write/read mem queue check
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2019-04-05
Jason Lowe...
tests: Add Jenkins presubmit and continuous test scripts
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2019-04-04
Javier Bueno
mem-cache: AMPM Prefetcher fails when restoring from...
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2019-04-03
Andrea Mondelli
misc: Removed inconsistency in O3* debug msgs
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2019-04-03
Andrea Mondelli
arch-mips: added missing override specifier (o3)
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2019-04-03
Javier Bueno
mem-cache: Fix PIF prefetcher compilation error with...
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2019-04-03
Javier Bueno
mem-cache: ISB prefetcher was triggering an assertion
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