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gem5.git
2019-05-17
Ciro Santilli
arch-arm: rename operands to match spec in isa/formats...
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2019-05-14
Tiago Muck
mem-ruby: MOESI_CMP_dir cleanup
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2019-05-14
Tiago Muck
mem-ruby: Cache latencies for MOESI_CMP_dir
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2019-05-14
Tiago Muck
mem-ruby: Hit latencies defined by the controllers
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2019-05-14
Tiago Muck
mem-ruby: Do not change blocked msg enqueue info
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2019-05-14
Tiago Muck
mem-ruby: Unique ranks for MOESI_CMP_dir in ports
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2019-05-14
Tiago Muck
mem-ruby: Change MOESI_CMP_Dir L2 addressing
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2019-05-14
Tiago Muck
mem-ruby: Fix MOESI_CMP_dir debug msg
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2019-05-14
Tiago Muck
mem-ruby: Prevent response stalls on MOESI_CMP_directory
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2019-05-14
Javier Bueno
arch-arm: Do not check MustBeOne flag for TLB requests...
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2019-05-14
Javier Bueno
configs: Fix duplicate branchPred reference in Simulati...
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2019-05-14
Giacomo Travaglini
Revert "cpu: fix how a thread starts up in MinorCPU"
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2019-05-14
Giacomo Travaglini
Revert "cpu: stop scheduling suspended threads in MinorCPU"
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2019-05-14
Giacomo Travaglini
Revert "cpu: fix branching when thread is suspended...
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2019-05-14
Daniel
mem-cache: Use SatCounter for prefetchers
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2019-05-14
Daniel
base: Add operators to SatCounter
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2019-05-14
Daniel
base: Add GTest to SatCounter
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2019-05-14
Daniel
base: Move SatCounter to base directory
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2019-05-14
Daniel
cpu: Revamp saturating counters
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2019-05-13
Jairo Balart
config: add an option to list and select indirect branc...
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2019-05-13
Jairo Balart
cpu: Make the indirect predictor into a SimObject
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2019-05-12
Daniel R. Carvalho
mem-ruby: Replace string parameter in MultiBitSelBloomF...
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2019-05-11
Giacomo Gabrielli
arch-arm: Add initial support for SVE contiguous loads...
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2019-05-11
Giacomo Gabrielli
cpu,mem: Add support for partial loads/stores and wide...
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2019-05-11
Giacomo Gabrielli
cpu: Add a memory access predicate
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2019-05-10
Brandon Potter
config, sim-se: bugfix for 54c77aa0
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2019-05-09
Daniel R. Carvalho
configs: Fix FileSystemConfig import
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2019-05-09
Daniel R. Carvalho
tests: Fix import scope of test
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2019-05-09
Tiago Muck
mem-ruby: Fix MOESI_CMP_directory blocked line handling
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2019-05-08
Daniel R. Carvalho
mem-cache: Remove writebacks packet list
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2019-05-08
Daniel R. Carvalho
mem-cache: Handle data expansion
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2019-05-08
Daniel R. Carvalho
mem-cache: Add co-allocation function to compressed...
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2019-05-08
Daniel R. Carvalho
mem-cache: Add compression and decompression calls
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2019-05-08
Daniel R. Carvalho
mem-cache: Create BDI Compressor
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2019-05-08
Daniel R. Carvalho
mem-cache: Add compression stats
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2019-05-08
Daniel R. Carvalho
mem-cache: Create cache compressor
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2019-05-08
Daniel R. Carvalho
mem-cache: Add block size to findVictim
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2019-05-08
Daniel R. Carvalho
mem-cache: Add compression data to CompressionBlk
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2019-05-08
Daniel R. Carvalho
mem-cache: Create CacheComp debug flag
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2019-05-08
Daniel R. Carvalho
mem-cache: Stub compression framework
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2019-05-07
Gabor Dozsa
x86: Mark translation as delayed in case of a hw page...
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2019-05-06
Andrea Mondelli
sim-se: correct statfs inclusion on !linux host
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2019-05-04
Alec Roelke
arch-riscv: Implement MHARTID CSR
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2019-05-03
Joe Gross
sim-se: fix a few bugs/warns from GCC 6
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2019-05-03
Brandon Potter
sim-se: add eventfd system call
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2019-05-03
Nikos Nikoleris
mem-cache: Mark block as dirty after a SWPrefetchEXResp
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2019-05-03
Avishai Tvila
arch-riscv,isa: Fix for compressed jump (c_j) imm
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2019-05-03
Giacomo Travaglini
dev: StreamID generation in DMA device
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2019-05-02
Gabe Black
tests: There is no architecture called "timing".
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2019-05-02
Giacomo Travaglini
dev-arm: Store a PhysProxy port in Gicv3Redist
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2019-05-02
Giacomo Travaglini
dev-arm: Add named variable for GICD_TYPER.IDBits
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2019-05-02
Giacomo Travaglini
dev-arm: Read correct version of ICC_BPR register
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2019-05-02
Giacomo Travaglini
dev-arm: Get a Gicv3Redistributor ptr from phys address
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2019-05-02
Giacomo Travaglini
dev-arm: Add several LPI methods in Gicv3Redistributor
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2019-05-02
Giacomo Travaglini
dev-arm: Take LPIs into account when interacting with...
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2019-05-02
Giacomo Travaglini
dev-arm: Fix GICv3 LPIs priority value
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2019-05-02
Giacomo Travaglini
dev-arm: Disable LPI Configuration Table caching
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2019-05-02
Giacomo Travaglini
dev-arm: Check EnableLPIs before checking for pending...
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2019-05-02
Giacomo Travaglini
dev-arm: GICv3 LPI tables are using physical addresses
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2019-05-02
Giacomo Travaglini
dev-arm: Fix GICv3 LPI loop
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2019-05-02
Giacomo Travaglini
dev-arm: Fix Bitwise operation in GICv3
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2019-05-02
Daniel R. Carvalho
tests: Add missing kernels to system creation
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2019-04-30
Gabe Black
arch: Stop using TheISA within the ISAs.
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2019-04-30
Gabe Black
x86: Get rid of some unnecessary TheISA-es in x86.
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2019-04-30
Gabe Black
sparc: Move translation constants from isa_traits.hh...
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2019-04-30
Gabe Black
sparc: Move the interrupt types out of isa_traits.hh...
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2019-04-30
Gabe Black
arch: Remove the mt.hh switching header.
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2019-04-30
Gabe Black
cpu: alpha: Delete all occurrances of the simPalCheck...
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2019-04-30
Gabe Black
alpha: Implement simPalCheck within the ISA description.
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2019-04-30
Gabe Black
cpu: Remove hwrei from the generic interfaces.
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2019-04-30
Alexandru Dutu
sim-se: use DPRINTF_SYSCALL for ioctl/wait4
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2019-04-30
Brandon Potter
sim-se: bugfix for 54c77aa055e
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2019-04-30
Gabe Black
arch: cpu: Track kernel stats using the base ISA agnost...
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2019-04-30
Gabe Black
alpha: Implement HWREI in the ISA.
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2019-04-30
Gabe Black
alpha: Add some control registers to the ISA operands...
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2019-04-30
Brandon Potter
sim-se: add socket ioctls
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2019-04-30
Gabe Black
systemc: Add a distinct async_request_update mechanism.
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2019-04-29
Gabe Black
cpu: Get rid of the (read|set)RegOtherThread methods.
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2019-04-29
Gabe Black
mips: Implement readRegOtherThread and setRegOtherThrea...
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2019-04-29
Gabe Black
cpu: Include debug flags regardless of whether the...
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2019-04-29
Steve Reinhardt
sim-se: create Proc out files in out dir
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2019-04-29
Giacomo Travaglini
arch-arm: Faults DebugFlag now printing inst opcode...
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2019-04-29
Giacomo Travaglini
arch-arm: Report real instruction encoding when Undefined
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2019-04-28
Gabe Black
arch, sim: Simplify the AuxVector type.
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2019-04-28
Gabe Black
mem: Remove the ISA specialized versions of port proxy...
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2019-04-28
Gabe Black
mem: Minimize the use of MemObject.
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2019-04-27
Gabe Black
python: Get rid of the VectorPort constructor.
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2019-04-27
Gabe Black
python: Replace the Master/Slave Ports with Request...
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2019-04-26
Giacomo Travaglini
arch-arm: updateMiscReg not setting isHyp in aarch64
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2019-04-26
Gabe Black
arm: Factor some repetition out of the ProcessInfo...
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2019-04-25
Gabe Black
arm: Fix some style issues in stacktrace.cc.
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2019-04-25
Gabe Black
x86: Refactor the ProcessInfo constructor.
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2019-04-25
David Hashe
configs: faux-filesystem fix w/ ruby in se mode
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2019-04-25
Gabe Black
x86: Fix some style issues in stacktrace.cc.
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2019-04-25
David Hashe
sim-se: add a faux-filesystem
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2019-04-25
Giacomo Travaglini
arch-arm: Remove un-needed hyp flag in TLBI operations
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2019-04-25
Giacomo Travaglini
arch-arm: Correct target EL field in TLBI operations
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2019-04-25
Giacomo Travaglini
dev-arm: Move GICv3 (Re)Ditributor address in Realview.py
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2019-04-25
Giacomo Travaglini
dev-arm: Limit number of max PE in GICv3 to 128
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2019-04-25
Giacomo Travaglini
dev-arm: Add GICv4 extension switch in GICv3
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