2018-02-19 |
Andreas Sandberg | arch-arm: Add support for secure state in semihosting |
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2018-02-19 |
Andreas Sandberg | mem: Refactor port proxies to support secure accesses |
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2018-02-19 |
Andreas Sandberg | arch-arm: Add aarch64 semihosting support |
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2018-02-16 |
Giacomo Travaglini | arch-arm: IMPLEMENTATION DEFINED register |
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2018-02-16 |
Giacomo Travaglini | arch-arm: Arch regs and pseudo regs distinction |
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2018-02-16 |
Chuan Zhu | arch-arm: Fix syntax error in TLB::getResultTe |
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2018-02-16 |
Chuan Zhu | arch-arm: Fix big endian support in {Load,Store}Double64 |
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2018-02-16 |
Chuan Zhu | arch-arm: Fix big endian support in do{Long,L1,L2}Descr... |
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2018-02-16 |
Andreas Sandberg | arch-arm: Add support for automatic reset addr selection |
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2018-02-16 |
Giacomo Travaglini | arch-arm: Change ArmFault cast from reinterpret to... |
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2018-02-16 |
Andreas Sandberg | arch-arm: Decode Brk64 instructions |
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2018-02-16 |
Andreas Sandberg | mem: Add PortProxy read/write helper with explicit... |
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2018-02-16 |
Chuan Zhu | sim: Add gtoh/htog helpers that take an explicit endianness |
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2018-02-16 |
Chuan Zhu | arch-arm: Fix Secure state check in checkFPAdvSIMDTrap64 |
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2018-02-14 |
Rico Amslinger | mem, sim-se: Fixed seg-fault in EmulationPageTable... |
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2018-02-13 |
Andreas Sandberg | dev: Remove unused interrupt controller in Terminal |
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2018-02-13 |
Rekai Gonzalez... | sim: Make Stats truly non-copy-constructible |
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2018-02-09 |
Wendy Elsasser | Fix DDR4_2400_8x8 DRAMCTRL configuration |
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2018-02-09 |
Giacomo Travaglini | sim: Remove _numContexts member in System class |
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2018-02-09 |
Jason Lowe... | dev: Fix i8042 device errors |
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2018-02-08 |
Daniel R. Carvalho | mem-cache: Make cache warmup percentage a parameter. |
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2018-02-08 |
Giacomo Travaglini | arch-arm: Correct SecureMonitorTrap vals for aarch32 |
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2018-02-08 |
Chuan Zhu | arch-arm: Fixed error in choosing vector offset |
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2018-02-08 |
Giacomo Travaglini | arch-arm: Don't change PSTATE in Illegal Exception... |
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2018-02-08 |
Chuan Zhu | arch-arm: Handle route to EL2 in Supervisor Trap |
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2018-02-07 |
Nikos Nikoleris | arch-arm: Change the type of fault for dc ivac instructions |
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2018-02-07 |
Nikos Nikoleris | arch-arm: Unify permission checks for dc * instructions |
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2018-02-07 |
Nikos Nikoleris | arch-arm: Check cache maintenance insts for permission... |
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2018-02-07 |
Nikos Nikoleris | arch-arm: Turn dc ivac to dc civac when some conditions... |
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2018-02-07 |
Nikos Nikoleris | arch-arm: Fix printing of the data cache maintenance... |
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2018-02-07 |
Nikos Nikoleris | arch-arm: Fix cache line size for cache maintenace... |
commit | commitdiff | tree |
2018-02-07 |
Nikos Nikoleris | arch-arm: Fault when dc ivac is executed from EL0 |
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2018-02-07 |
Nikos Nikoleris | mem-cache: Only pendingModified MSHRs can satisfy CMO... |
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2018-02-07 |
Nikos Nikoleris | mem-cache: Cleaned blocks should be marked as not writable |
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2018-02-07 |
Giacomo Travaglini | arch-arm: Change function name for banked miscregs |
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2018-02-07 |
Giacomo Travaglini | arch-arm: Fix AArch32 SETEND Instruction |
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2018-02-07 |
Giacomo Travaglini | arch-arm: Correct Illegal Exception Return detection |
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2018-02-07 |
Giacomo Travaglini | arch-arm: ELUsingAArch32K from armarm pseudocode |
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2018-02-07 |
Giacomo Travaglini | arch-arm: isSecureBelow from armarm pseudocode |
commit | commitdiff | tree |
2018-02-07 |
Chuan Zhu | arch-arm: Fix incorrect assumptions in ELIs64 |
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2018-02-06 |
Daniel R. Carvalho | mem-cache: Remove extra numSets zero check. |
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2018-02-06 |
Daniel R. Carvalho | mem: Standardize mem folder header guards |
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2018-02-05 |
Gabe Black | base: Update #includes for bitunion.hh. |
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2018-02-05 |
Nayan Deshmukh | config: remove dead code in fs.py |
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2018-02-05 |
Giacomo Travaglini | cpu: MinorCPU handling IsSquashAfter flag |
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2018-02-05 |
Giacomo Travaglini | arch-arm: Removing Serializing flag from ISB |
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2018-02-02 |
Nikos Nikoleris | base: Fix unused function warning |
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2018-02-01 |
Sujay Phadke | alpha: fix for no 'break' in the case statement |
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2018-02-01 |
Hanhwi Jang | scons: Resolve backtrace implementation existence testi... |
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2018-01-31 |
Christian Menard | arch-x86: consistent style of comments in system files |
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2018-01-30 |
Maximilian... | arch-x86: Granularity bit and segment limit |
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2018-01-29 |
Gabe Black | riscv: Add overrides to various StaticInst methods. |
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2018-01-29 |
Gabe Black | base: Remove the ability to cprintf stringstreams directly. |
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2018-01-29 |
Gabe Black | base: Delete commented out versions of the format_integ... |
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2018-01-29 |
Curtis Dunham | arch-arm: understandably initialize register permissions |
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2018-01-29 |
Curtis Dunham | arm: extend MiscReg metadata structures |
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2018-01-29 |
Curtis Dunham | arch-arm: understandably initialize register mappings |
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2018-01-29 |
Curtis Dunham | config, arm: enable device tree autogeneration for... |
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2018-01-29 |
Glenn Bergmans | config: Embed Device Tree generation in fs.py config |
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2018-01-29 |
Glenn Bergmans | arm: DT autogeneration - generate PCI node |
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2018-01-29 |
Glenn Bergmans | arm: DT autogeneration - Generate energy controller... |
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2018-01-29 |
Glenn Bergmans | arm: DT autogeneration - autogenerate RealView Platform... |
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2018-01-29 |
Glenn Bergmans | arm: DT autogeneration - Generate memory node |
commit | commitdiff | tree |
2018-01-29 |
Glenn Bergmans | arm: DT autogeneration - Generate cpus node |
commit | commitdiff | tree |
2018-01-29 |
Glenn Bergmans | arm: DT autogeneration - Device Tree generation methods |
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2018-01-29 |
Glenn Bergmans | ext: DT autogeneration - Add PyFtd to m5 space |
commit | commitdiff | tree |
2018-01-29 |
Curtis Dunham | arm: make Arm GenericTimer a ClockedObject |
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2018-01-27 |
Gabe Black | base: Add an "override" to name() in the HardBreakpoint... |
commit | commitdiff | tree |
2018-01-27 |
Gabe Black | base: Get bitunions to compile on clang 3.8. |
commit | commitdiff | tree |
2018-01-25 |
Hanhwi Jang | util: Implement Lua module for m5ops. |
commit | commitdiff | tree |
2018-01-23 |
Swapnil Haria | arch-x86: Adding clflush, clflushopt, clwb instructions |
commit | commitdiff | tree |
2018-01-23 |
Gabe Black | arch: Remove the "arch/tlb.hh" switching header. |
commit | commitdiff | tree |
2018-01-23 |
Gabe Black | tarch, mem: Abstract the data stored in the SE page... |
commit | commitdiff | tree |
2018-01-23 |
Gabe Black | x86, mem: Rewrite the multilevel page table class. |
commit | commitdiff | tree |
2018-01-20 |
Hanhwi Jang | util: Implement PIC version of m5ops for X86. |
commit | commitdiff | tree |
2018-01-20 |
Gabe Black | x86, mem: Don't try to force physical addresses on... |
commit | commitdiff | tree |
2018-01-20 |
Gabe Black | x86, mem: Get rid of PageTableOps::getBasePtr. |
commit | commitdiff | tree |
2018-01-20 |
Gabe Black | x86, mem: Pass the multi level page table layout in... |
commit | commitdiff | tree |
2018-01-20 |
Gabe Black | arch, mem: Make the page table lookup function return... |
commit | commitdiff | tree |
2018-01-20 |
Gabe Black | base: Hide the BitUnion::__StorageType type. |
commit | commitdiff | tree |
2018-01-20 |
Gabe Black | arm, base: Generalize and move the BitUnion hash struct. |
commit | commitdiff | tree |
2018-01-20 |
Gabe Black | sim: Use the new BitUnion templates in serialize.hh. |
commit | commitdiff | tree |
2018-01-20 |
Gabe Black | base: Enable specializing templates on BitUnion types. |
commit | commitdiff | tree |
2018-01-20 |
Gabe Black | base: Rework bitunions so they can be more flexible. |
commit | commitdiff | tree |
2018-01-20 |
Gabe Black | sim, arch, base: Refactor the base remote GDB class. |
commit | commitdiff | tree |
2018-01-19 |
Gabe Black | arch, mem, sim: Consolidate and rename the SE mode... |
commit | commitdiff | tree |
2018-01-18 |
Andreas Sandberg | util: Add an option to specify paths in list_changes.py |
commit | commitdiff | tree |
2018-01-17 |
Gabe Black | mem: Change the multilevel page table to inherit from... |
commit | commitdiff | tree |
2018-01-16 |
Alec Roelke | arch-riscv: Fix floating-poing op classes |
commit | commitdiff | tree |
2018-01-16 |
Alec Roelke | arch-riscv: Fix floating-point conversion bugs |
commit | commitdiff | tree |
2018-01-16 |
Gabe Black | sim: Simplify registerThreadContext a little bit. |
commit | commitdiff | tree |
2018-01-15 |
Gabe Black | mem: Track TLB entries in the lookup cache as pointers. |
commit | commitdiff | tree |
2018-01-15 |
Gabe Black | arch: Fix a fatal_if in most of the arch's process... |
commit | commitdiff | tree |
2018-01-12 |
Xiaoyu Ma | sim: Allow passing a user-defined L2XBar to addTwoLevel... |
commit | commitdiff | tree |
2018-01-11 |
Earl Ou | util/m5: add Android.mk |
commit | commitdiff | tree |
2018-01-11 |
Alec Roelke | arch-riscv: Don't crash when printing unknown CSRs |
commit | commitdiff | tree |
2018-01-11 |
Nikos Nikoleris | mem-ruby: Fix wakeup timeouts for the MOESI_CMP_token... |
commit | commitdiff | tree |
2018-01-11 |
Nikos Nikoleris | mem-ruby: Remove function that maps responses to a... |
commit | commitdiff | tree |
2018-01-11 |
Nikos Nikoleris | mem-ruby: Add support for multiple DMA engines in MESI_... |
commit | commitdiff | tree |
2018-01-11 |
Gabe Black | cpu: Make the CPU's TLB parameter a BaseTLB. |
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