2019-06-12 |
Sandipan Das | [PATCH] scons: Fix compilation issues with gcc-8.x |
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2019-06-12 |
Phanikiran... | power: Add support for Radix Translation |
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2019-06-12 |
Phanikiran... | power: Add support for real-mode addressing (translatio... |
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2019-06-12 |
Phanikiran... | power: Add support for handling the Decrementer Interrupt |
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2019-06-12 |
Phanikiran... | arch-power: Define more special purpose registers,... |
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2018-06-12 |
Phanikiran... | power: Added support for CR, XER, FPSR, MSR, PTCR Registers |
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2018-06-12 |
phanikiran | Power: Add a minimal system configuration |
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2018-06-07 |
Sandipan Das | arch-power: Update hello test program |
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2018-06-07 |
Sandipan Das | arch-power: Fix stack layout for 64-bit execution |
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2018-06-07 |
Sandipan Das | arch-power: Add branch target address register instructions |
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2018-06-07 |
Sandipan Das | arch-power: Fix branch instructions |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point doubleword rotate instructions |
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2018-06-07 |
Sandipan Das | arch-power: Add fields for MD and MDS form instructions |
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2018-06-07 |
Sandipan Das | arch-power: Fix fixed-point word rotate instructions |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point doubleword shift instructions |
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2018-06-07 |
Sandipan Das | arch-power: Add fields for XS form instructions |
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2018-06-07 |
Sandipan Das | arch-power: Fix fixed-point word shift instructions |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point logical bit permute instruc... |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point logical parity instructions |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point logical population count... |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point logical count zeros instruc... |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point logical extend sign instruc... |
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2018-06-07 |
Sandipan Das | arch-power: Fix fixed-point logical instructions |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point compare instructions |
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2018-06-07 |
Sandipan Das | arch-power: Fix fixed-point compare instructions |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point doubleword arithmetic modul... |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point doubleword arithmetic divid... |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point doubleword arithmetic divid... |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point doubleword multipy-add... |
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2018-06-07 |
Sandipan Das | arch-power: Add fields for VA form instructions |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point doubleword multiply instruc... |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point arithmetic add instructions |
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2018-06-07 |
Sandipan Das | arch-power: Add fields for DX form instructions |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point word arithmetic modulo... |
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2018-06-07 |
Sandipan Das | arch-power: Add fixed-point word arithmetic divide... |
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2018-06-07 |
Sandipan Das | arch-power: Fix fixed-point arithmetic multiply and... |
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2018-06-07 |
Sandipan Das | arch-power: Fix fixed-point arithmetic add and subtract... |
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2018-06-06 |
Sandipan Das | arch-power: Add fixed-point store conditional instructions |
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2018-06-06 |
Sandipan Das | arch-power: Add fixed-point load and reserve instructions |
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2018-06-06 |
Sandipan Das | arch-power: Add fixed-point byte-reversed load and... |
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2018-06-06 |
Sandipan Das | arch-power: Add fixed-point doubleword load and store... |
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2018-06-06 |
Sandipan Das | arch-power: Fix fixed-point load and store instructions |
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2018-06-06 |
Sandipan Das | arch-power: Introduce proper opcode fields |
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2018-06-06 |
Sandipan Das | arch-power: Reorder instruction decoding logic |
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2018-06-06 |
Sandipan Das | arch-power: Make ELF interpreter read 64-bit LSB execut... |
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2018-06-04 |
Sandipan Das | arch-power: Switch to 64-bit registers and operands |
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2018-06-04 |
Sandipan Das | arch-power: Rename program counter registers |
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2018-06-04 |
Sandipan Das | arch-power: Simplify doubleword operand types |
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2018-06-01 |
Daniel R. Carvalho | mem-cache: Privatize extractSet |
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2018-06-01 |
Daniel R. Carvalho | mem-cache: Create an address aware TempCacheBlk |
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2018-06-01 |
Daniel R. Carvalho | mem-cache: Fix secure bit modification |
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2018-05-31 |
Nikos Nikoleris | mem-cache: Replace block visitor with std::function |
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2018-05-31 |
Nikos Nikoleris | mem-cache: Fix include directives in the cache related... |
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2018-05-31 |
Nikos Nikoleris | mem-cache: Add a non-coherent cache |
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2018-05-31 |
Nikos Nikoleris | mem-cache: Move cache bypass mechanism to the ports |
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2018-05-31 |
Nikos Nikoleris | mem-cache: Adopt a more sensible cache class hierarchy |
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2018-05-31 |
Nikos Nikoleris | mem-cache: Add helper function to perform evictions |
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2018-05-31 |
Nikos Nikoleris | mem-cache: Delegate block invalidation to block allocation |
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2018-05-31 |
Nikos Nikoleris | mem-cache: Refactor the recvAtomic function |
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2018-05-31 |
Nikos Nikoleris | mem-cache: Refactor the cache recvTimingReq function |
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2018-05-31 |
Nikos Nikoleris | mem-cache: Refactor the cache recvTimingResp function |
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2018-05-31 |
Daniel R. Carvalho | mem-cache: Fix RandomReplData |
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2018-05-30 |
Brandon Potter | gpu-compute: use X86ISA::TlbEntry over GpuTlbEntry |
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2018-05-30 |
Michael LeBeane | dev: Exit correctly in dist-gem5 for SE mode |
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2018-05-30 |
Nikos Nikoleris | mem-cache: Determine if an MSHR has requests from anoth... |
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2018-05-29 |
Giacomo Travaglini | arch-arm: ISA param for treating MISCREG_IMPDEF_UNIMPL... |
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2018-05-29 |
Giacomo Travaglini | arch-arm: Remove unusued MISCREG_A64_UNIMPL |
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2018-05-29 |
Giacomo Travaglini | arch-arm: MPIDR.MT = 1 in a multithreaded system |
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2018-05-29 |
Giacomo Travaglini | arch-arm: S3_<op1>_<Cn>_<Cm>_<op2> are Implementation... |
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2018-05-29 |
Giacomo Travaglini | cpu: Avoid unnecessary dynamic_pointer_cast in atomic... |
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2018-05-29 |
Giacomo Travaglini | arch-arm: Implement ARMv8.1 TTBR1_EL2 register |
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2018-05-29 |
Giacomo Travaglini | arch-arm: Add E2H bit to HCR_EL2 System register |
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2018-05-24 |
Gabe Black | x86: Add op classes to the MediaOps. |
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2018-05-18 |
Wendy Elsasser | mem: Add support for more flexible DRAM timing and... |
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2018-05-18 |
Wendy Elsasser | mem: Optimize self-refresh entry |
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2018-05-17 |
Nikos Nikoleris | mem-cache: Move reference count stats update to blk... |
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2018-05-17 |
Nikos Nikoleris | mem-cache: Remove isTouched field from the CacheBlk |
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2018-05-17 |
Nikos Nikoleris | mem-cache: Move replacements stat to the base cache... |
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2018-05-17 |
Nikos Nikoleris | base: Add M5 flag for [[nodiscard]] attribute |
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2018-05-17 |
Nikos Nikoleris | mem-cache: Simplify writeback for the tempBlock in... |
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2018-05-16 |
Andreas Sandberg | arch-arm: Fix semihosting arg count for SYS_GET_CMDLINE |
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2018-05-16 |
Andreas Sandberg | arch-arm: Add support for semihosting STDIO redirection |
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2018-05-16 |
Tony Gutierrez | style: fix amd license and style issues |
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2018-05-15 |
Tony Gutierrez | gpu-compute: Cleanup the scheduler a bit |
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2018-05-12 |
Alec Roelke | arch-riscv: Update CSR implementations |
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2018-05-09 |
Giacomo Travaglini | sim: Remove trailing dot when assigning a master's... |
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2018-05-09 |
Andreas Sandberg | base, dev: Fix port message for vnc and terminal |
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2018-05-08 |
Matt Sinclair | arch-x86, arch-power: fix calls to bits and insertBits |
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2018-05-08 |
Daniel R. Carvalho | mem-cache: Create block insertion function |
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2018-05-08 |
Giacomo Travaglini | arch-arm: Map ID_x_EL1 registers to AArch32 version |
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2018-05-08 |
Andreas Sandberg | dev: Add support for a simple debug UART |
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2018-05-04 |
Giacomo Travaglini | scons: Fix --with-ubsan/asan compilation flags |
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2018-05-03 |
Brad Beckmann | mem-ruby: Consistent dprintf formats for issue outcomes |
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2018-05-03 |
Tony Gutierrez | arch-x86: Enable fstatfs for x86_64 |
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2018-05-03 |
Daniel R. Carvalho | mem-cache: Create Second-Chance replacement policy |
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2018-05-03 |
Daniel R. Carvalho | mem-cache: ReplacementPolicy specific replacement data |
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2018-05-02 |
Steve Reinhardt | arch-x86: implement movntps/movntpd SSE insts |
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2018-05-02 |
Gabe Black | x86: Add a ld/st microop flag for marking an access... |
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2018-05-02 |
Tony Gutierrez | arch-x86: Enable the umask system call |
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2018-04-27 |
Giacomo Travaglini | sim,cpu,mem,arch: Introduced MasterInfo data structure |
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