projects
/
yosys.git
/ shortlog
commit
grep
author
committer
pickaxe
?
search:
re
summary
| shortlog |
log
|
commit
|
commitdiff
|
tree
first ⋅ prev ⋅
next
yosys.git
2019-03-19
Eddie Hung
Add author name
commit
|
commitdiff
|
tree
2019-02-19
Eddie Hung
Add aiger tests to make tests
commit
|
commitdiff
|
tree
2019-02-19
Eddie Hung
Merge branch 'master' into read_aiger
commit
|
commitdiff
|
tree
2019-02-19
Eddie Hung
Merge pull request #805 from eddiehung/dff_init
commit
|
commitdiff
|
tree
2019-02-19
Eddie Hung
Fix for using POSIX basename
commit
|
commitdiff
|
tree
2019-02-18
Eddie Hung
Missing OSX headers?
commit
|
commitdiff
|
tree
2019-02-18
Eddie Hung
Revert "Missing headers for Xcode?"
commit
|
commitdiff
|
tree
2019-02-18
Eddie Hung
Merge branch 'dff_init' into read_aiger
commit
|
commitdiff
|
tree
2019-02-17
Eddie Hung
Instead of INIT param on cells, use initial statement...
commit
|
commitdiff
|
tree
2019-02-17
Eddie Hung
Revert "Add INIT parameter to all ff/latch cells"
commit
|
commitdiff
|
tree
2019-02-17
Eddie Hung
read_aiger to ignore line after ands for ascii, not...
commit
|
commitdiff
|
tree
2019-02-17
Eddie Hung
One more merge conflict
commit
|
commitdiff
|
tree
2019-02-17
Eddie Hung
Merge branch 'dff_init' into read_aiger
commit
|
commitdiff
|
tree
2019-02-17
Eddie Hung
Merge https://github.com/YosysHQ/yosys into dff_init
commit
|
commitdiff
|
tree
2019-02-17
Eddie Hung
Merge https://github.com/YosysHQ/yosys into read_aiger
commit
|
commitdiff
|
tree
2019-02-17
Clifford Wolf
Merge pull request #811 from ucb-bar/firrtlfixes
commit
|
commitdiff
|
tree
2019-02-15
Jim Lawson
Removed unused variables, functions.
commit
|
commitdiff
|
tree
2019-02-15
Jim Lawson
Append (instead of over-writing) EXTRA_FLAGS
commit
|
commitdiff
|
tree
2019-02-15
Jim Lawson
Update cells supported for verilog to FIRRTL conversion.
commit
|
commitdiff
|
tree
2019-02-13
Clifford Wolf
Fix sign handling of real constants
commit
|
commitdiff
|
tree
2019-02-12
Eddie Hung
Missing headers for Xcode?
commit
|
commitdiff
|
tree
2019-02-12
Eddie Hung
Merge branch 'read_aiger' of github.com:eddiehung/yosys...
commit
|
commitdiff
|
tree
2019-02-12
Eddie Hung
Use module->add{Not,And}Gate() functions
commit
|
commitdiff
|
tree
2019-02-12
Clifford Wolf
Merge pull request #802 from whitequark/write_verilog_a...
commit
|
commitdiff
|
tree
2019-02-12
Clifford Wolf
Merge pull request #806 from daveshah1/fsm_opt_no_reset
commit
|
commitdiff
|
tree
2019-02-11
Eddie Hung
Do not break for constraints
commit
|
commitdiff
|
tree
2019-02-11
Eddie Hung
No increment line_count for binary ANDs
commit
|
commitdiff
|
tree
2019-02-11
Eddie Hung
Do not ignore newline after AND in binary AIG
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Merge remote-tracking branch 'origin/dff_init' into...
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
addDff -> addDffGate as per @daveshah1
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Fix tabulation
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
-module_name arg to go before -clk_name
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Support and differentiate between ASCII and binary...
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Add missing "[options]" to read_blif help
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Allow module name to be determined by argument too
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Refactor into AigerReader class
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Parse binary AIG files
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Add binary AIGs converted from AAG
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Refactor to parse_aiger_header()
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Add comment
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Handle reset logic in latches
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Change literal vars from int to unsigned
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Create clk outside of latch loop
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Handle latch symbols too
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Remove return after log_error
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Add support for symbol tables
commit
|
commitdiff
|
tree
2019-02-08
Eddie Hung
Stub for binary AIGER
commit
|
commitdiff
|
tree
2019-02-07
David Shah
fsm_opt: Fix runtime error for FSMs without a reset...
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Cope WIDTH of ff/latch cells is default of zero
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Refactor
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Remove check for cell->name[0] == '$'
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Merge branch 'dff_init' of https://github.com/eddiehung...
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Revert most of autotest.sh; for non *.v use Yosys to...
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Refactor
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
write_verilog to cope with init attr on q when -noexpr
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Add INIT parameter to all ff/latch cells
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Add tests for simple cases using defparam
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Add -B option to autotest.sh to append to backend_opts
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Extend testcase
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Add testcase
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
Rename ASCII tests
commit
|
commitdiff
|
tree
2019-02-06
Eddie Hung
WIP
commit
|
commitdiff
|
tree
2019-02-06
Clifford Wolf
Add missing blackslash-to-slash convertion to smtio...
commit
|
commitdiff
|
tree
2019-02-05
Eddie Hung
Add tests
commit
|
commitdiff
|
tree
2019-01-29
whitequark
write_verilog: correctly emit asynchronous transparent...
commit
|
commitdiff
|
tree
2019-01-27
Clifford Wolf
Merge pull request #798 from mmicko/master
commit
|
commitdiff
|
tree
2019-01-27
Clifford Wolf
Merge pull request #800 from whitequark/write_verilog_t...
commit
|
commitdiff
|
tree
2019-01-27
Clifford Wolf
Merge branch 'whitequark-write_verilog_keyword'
commit
|
commitdiff
|
tree
2019-01-27
Clifford Wolf
Remove asicworld tests for (unsupported) switch-level...
commit
|
commitdiff
|
tree
2019-01-27
whitequark
write_verilog: write $tribuf cell as ternary.
commit
|
commitdiff
|
tree
2019-01-27
whitequark
write_verilog: escape names that match SystemVerilog...
commit
|
commitdiff
|
tree
2019-01-25
David Shah
Merge pull request #796 from whitequark/proc_clean_typo
commit
|
commitdiff
|
tree
2019-01-25
Miodrag Milanovic
Fixed Anlogic simulation model
commit
|
commitdiff
|
tree
2019-01-23
whitequark
proc_clean: fix critical typo.
commit
|
commitdiff
|
tree
2019-01-19
Clifford Wolf
Merge pull request #793 from whitequark/proc_clean_fix_...
commit
|
commitdiff
|
tree
2019-01-18
whitequark
proc_clean: fix fully def check to consider compare...
commit
|
commitdiff
|
tree
2019-01-17
Clifford Wolf
Cleanups in igloo2 example design
commit
|
commitdiff
|
tree
2019-01-17
Clifford Wolf
Add SF2 IO buffer insertion
commit
|
commitdiff
|
tree
2019-01-17
Clifford Wolf
Improve Igloo2 example
commit
|
commitdiff
|
tree
2019-01-17
Clifford Wolf
Add "synth_sf2 -vlog", fix "synth_sf2 -edif"
commit
|
commitdiff
|
tree
2019-01-17
Clifford Wolf
Add "write_edif -gndvccy"
commit
|
commitdiff
|
tree
2019-01-15
Clifford Wolf
Add optional nullstr argument to log_id()
commit
|
commitdiff
|
tree
2019-01-15
Clifford Wolf
Fix handling of $shiftx in Verilog back-end
commit
|
commitdiff
|
tree
2019-01-15
Clifford Wolf
Merge pull request #788 from whitequark/master
commit
|
commitdiff
|
tree
2019-01-15
Clifford Wolf
Merge pull request #787 from whitequark/flowmap_relax
commit
|
commitdiff
|
tree
2019-01-14
whitequark
manual: document some gates.
commit
|
commitdiff
|
tree
2019-01-14
whitequark
manual: explain $tribuf cell.
commit
|
commitdiff
|
tree
2019-01-08
Clifford Wolf
Improve igloo2 example
commit
|
commitdiff
|
tree
2019-01-08
whitequark
flowmap: clean up terminology.
commit
|
commitdiff
|
tree
2019-01-08
whitequark
flowmap: implement depth relaxation.
commit
|
commitdiff
|
tree
2019-01-07
Clifford Wolf
Fix typo in manual
commit
|
commitdiff
|
tree
2019-01-07
Clifford Wolf
Bugfix in $memrd sharing
commit
|
commitdiff
|
tree
2019-01-07
Clifford Wolf
Merge pull request #782 from whitequark/flowmap_dfs
commit
|
commitdiff
|
tree
2019-01-07
Clifford Wolf
Switch "bugpoint" from system() to run_command()
commit
|
commitdiff
|
tree
2019-01-07
Clifford Wolf
Merge pull request #783 from whitequark/bugpoint
commit
|
commitdiff
|
tree
2019-01-07
whitequark
bugpoint: new pass.
commit
|
commitdiff
|
tree
2019-01-06
whitequark
flowmap: construct a max-volume max-flow min-cut, not...
commit
|
commitdiff
|
tree
2019-01-06
Clifford Wolf
Merge pull request #780 from phire/rename_from_wire
commit
|
commitdiff
|
tree
2019-01-06
Scott Mansell
Rename cells based on the wires they drive.
commit
|
commitdiff
|
tree
2019-01-05
Clifford Wolf
Add skeleton Yosys-Libero igloo2 example project
commit
|
commitdiff
|
tree
next