2019-04-25 |
Giacomo Travaglini | dev-arm: Move GICv3 (Re)Ditributor address in Realview.py |
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2019-04-25 |
Giacomo Travaglini | dev-arm: Limit number of max PE in GICv3 to 128 |
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2019-04-25 |
Giacomo Travaglini | dev-arm: Add GICv4 extension switch in GICv3 |
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2019-04-25 |
Giacomo Travaglini | dev-arm: Check for maximum number of supported PE in... |
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2019-04-24 |
Javier Bueno | config: Add flag options to set the hardware prefetcher... |
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2019-04-24 |
Andrea Mondelli | cpu,mem: missing override specifier |
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2019-04-24 |
Gabe Black | systemc: Use the new TLM socket types in the TLM bridge... |
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2019-04-24 |
Gabe Black | systemc: Add Port types for initiator and target sockets. |
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2019-04-24 |
Gabe Black | dev: Use the new Port role mechanism to make an EtherIn... |
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2019-04-24 |
Gabe Black | python: Generalize the Port.splice function. |
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2019-04-24 |
Gabe Black | python: Generalize the dot_writer to handle non Master... |
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2019-04-24 |
Gabe Black | python: Make Port roles a more generic concept. |
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2019-04-23 |
Ciro Santilli | python: fix tracing after Python 3 refactor |
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2019-04-22 |
Alexandru Dutu | sim-se: Enhance clone for X86KvmCPU |
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2019-04-22 |
Daniel | mem-cache: Fix fix of replacement count |
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2019-04-22 |
Gabe Black | cpu: Eliminate the ProxyThreadContext class. |
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2019-04-22 |
Po-Hao Su | configs: Use param to get number of processors |
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2019-04-19 |
Daniel R. Carvalho | mem-cache: Fix increasing replacement count |
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2019-04-19 |
Daniel R. Carvalho | mem-cache: Remove blk_addr from Queue::trySatisfyFunctional |
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2019-04-19 |
Daniel R. Carvalho | mem-cache: Add match functions to QueueEntry |
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2019-04-19 |
Daniel R. Carvalho | mem: Add packet matching functions |
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2019-04-19 |
Daniel R. Carvalho | mem-cache: Move Target to QueueEntry |
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2019-04-19 |
Daniel R. Carvalho | mem-cache: Assert Entry inherits from QueueEntry in... |
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2019-04-19 |
Daniel R. Carvalho | mem: Make DRAMCtrl::decodeAddr const |
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2019-04-19 |
Daniel R. Carvalho | mem: Allow packet to provide its own addr range |
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2019-04-16 |
Andrea Mondelli | mem: missing override specifier |
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2019-04-14 |
Gabe Black | mem: Teach SimpleMem to return a MemBackdoor when appro... |
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2019-04-14 |
Gabe Black | mem: Maintain a back door into the AbstractMem's backin... |
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2019-04-12 |
Rutuja Oza | tests: Add tests for learning_gem5 configs |
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2019-04-12 |
Jason Lowe... | tests: Add protocol as an option to SconsFixture |
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2019-04-12 |
Hoa Nguyen | tests: add riscv to cpu tests |
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2019-04-11 |
Anis Peysieux | mem-cache: Fix RRPV for RRIP |
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2019-04-11 |
Giacomo Travaglini | arch-arm: Enable PMSELR_EL0 read in PMU |
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2019-04-10 |
Gabe Black | mem: Plumb backdoor requests through the xbar classes. |
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2019-04-10 |
Gabe Black | systemc: Teach the TLM bridges how to use gem5's new... |
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2019-04-10 |
Gabe Black | mem: Add sendAtomicBackdoor/recvAtomicBackdoor port... |
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2019-04-10 |
Nikos Nikoleris | mem-cache: Fix MSHR handling of cache clean requests |
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2019-04-10 |
Giacomo Travaglini | cpu: O3 switchFreeList checking VecElems instead of... |
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2019-04-08 |
Jason Lowe... | learning_gem5,configs: Update ruby_test |
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2019-04-08 |
Jason Lowe... | learning_gem5: Fix vector port panic in SimpleCache |
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2019-04-08 |
Jason Lowe... | configs: Fix import path error in learning_gem5 part3 |
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2019-04-08 |
Jason Lowe... | configs: Add full path for learning_gem5 binaries |
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2019-04-08 |
Ryan Gambord | configs: Removed redudant exec-style import |
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2019-04-06 |
Gabe Black | mem: Add a MemBackdoor type to track memory backdoors. |
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2019-04-05 |
Nikos Nikoleris | cpu: Correctly account for executed instructions in... |
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2019-04-05 |
Ryan Gambord | mem-cache: ambiguous use of abs function |
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2019-04-05 |
Jason Lowe... | mem: Reverse order of write/read mem queue check |
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2019-04-05 |
Jason Lowe... | tests: Add Jenkins presubmit and continuous test scripts |
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2019-04-04 |
Javier Bueno | mem-cache: AMPM Prefetcher fails when restoring from... |
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2019-04-03 |
Andrea Mondelli | misc: Removed inconsistency in O3* debug msgs |
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2019-04-03 |
Andrea Mondelli | arch-mips: added missing override specifier (o3) |
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2019-04-03 |
Javier Bueno | mem-cache: Fix PIF prefetcher compilation error with... |
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2019-04-03 |
Javier Bueno | mem-cache: ISB prefetcher was triggering an assertion |
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2019-04-03 |
Javier Bueno | mem-cache: Fix panic in Indirect Memory prefetcher |
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2019-04-02 |
Giacomo Travaglini | dev-arm: Make GICv3 maintenance interrupt an ArmInterrupt |
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2019-04-02 |
Ivan Pizarro | mem-cache: Proactive Instruction Fetch Implementation |
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2019-04-01 |
Andrea Mondelli | dev-arm: Correct cast of template parameter |
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2019-03-29 |
Gabe Black | systemc: Templatize the gem5/TLM bridge SimObjects. |
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2019-03-29 |
Gabe Black | systemc: Delete extra code from src/systemc/tlm_bridge. |
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2019-03-29 |
Gabe Black | systemc: Create unified gem5/TLM bridge SimObjects. |
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2019-03-29 |
Gabe Black | tlm: Initial import of tlm/gem5 bridge code. |
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2019-03-29 |
Gabe Black | systemc: Provide a utility Port TLM socket wrapper... |
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2019-03-28 |
Javier Bueno | cpu: Added a probe to notify the address of retired... |
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2019-03-28 |
Daniel R. Carvalho | mem-cache: Remove extra cache header from AMAP |
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2019-03-28 |
Javier Setoain | arch-arm: Fix use of bitwise operators on booleans |
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2019-03-28 |
Giacomo Travaglini | arch-arm: Fix index generation for VecElem operands |
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2019-03-27 |
Giacomo Travaglini | dev-arm: Rename GIC maintenance interrupt from ppint... |
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2019-03-27 |
Giacomo Travaglini | dev-arm: Fix GICv3 overflow for INTID > 256 |
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2019-03-27 |
Giacomo Travaglini | dev-arm: Writing ICENABLER for non-SPIs is RAZ/WI ... |
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2019-03-27 |
Javier Bueno | config: Use the corresponding HPI Caches when using... |
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2019-03-27 |
Pau Cabre | cpu: Fixed the indirect branch predictor GHR handling |
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2019-03-26 |
Gabe Black | mem: Deleting this init() method was accidentally dropp... |
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2019-03-26 |
Gabe Black | mem: Clean up the xbars a little. |
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2019-03-26 |
Gabe Black | base: Make AddrRangeMap able to return non-const iterators. |
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2019-03-26 |
Javier Bueno | configs: fix class reference in CacheConfigs |
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2019-03-26 |
Giacomo Travaglini | dev-arm: Set/Unset dma coherent mode from python |
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2019-03-26 |
Isaac Sánchez... | base,python: Fix to allow multiple --debug-ignore values. |
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2019-03-25 |
Daniel R. Carvalho | configs: Remove default kernel value from system creation |
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2019-03-25 |
Javier Setoain | arch-arm: Add missing fall-through defaults |
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2019-03-25 |
Sandipan Das | arch-power: Rename program counter registers |
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2019-03-25 |
Sandipan Das | arch-power: Simplify doubleword operand types |
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2019-03-23 |
Andrea Mondelli | misc: missing override specifier |
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2019-03-22 |
Tiago Muck | sim-se: Fixed initialization array size |
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2019-03-22 |
Giacomo Travaglini | base: Fix CircularQueue's operator-= when negative... |
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2019-03-22 |
Giacomo Travaglini | base: Fix CircularQueue when diffing iterators |
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2019-03-21 |
Andrea Mondelli | dev-arm: ambiguous use of getPort() |
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2019-03-21 |
Jason Lowe... | tests: Add ignore for stdin not terminal |
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2019-03-21 |
Jason Lowe... | tests: Use full path for DownloadedProgram |
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2019-03-21 |
Jason Lowe... | tests: Fix race condition in download fixture |
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2019-03-21 |
Jason Lowe... | ext,tests: Add back failing exceptions |
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2019-03-21 |
Jason Lowe... | tests,ext: Add skip_cleanup implementation for TempdirF... |
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2019-03-21 |
Jason Lowe... | ext,tests: Make return code based on test results |
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2019-03-21 |
Jason Lowe... | ext,test: Provide default terminal size |
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2019-03-21 |
Ryan Gambord | cpu-kvm: Added informative error message |
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2019-03-20 |
Javier Bueno | mem-cache: Added the STeMS prefetcher |
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2019-03-19 |
Gabe Black | systemc: Hook up gem5_getPort to the gem5 getPort mecha... |
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2019-03-19 |
Gabe Black | arch, cpu, dev, gpu, mem, sim, python: start using... |
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2019-03-19 |
Gabe Black | python: Switch to the new getPort mechanism to connect... |
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2019-03-19 |
Gabe Black | mem: Move bind() and unbind() into the Port class. |
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2019-03-19 |
Gabe Black | sim: Add a getPort function to SimObject. |
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