yosys.git
2013-07-05 Clifford WolfAdded xsthammer report generator
2013-07-04 Clifford WolfImproved xsthammer quartus support
2013-07-04 Clifford WolfAdded Altera Cyclon III cell library to xsthammer
2013-07-04 Clifford WolfDocumentation updates
2013-07-04 Clifford WolfAdded defparam support to Verilog/AST frontend
2013-07-03 Clifford WolfAdded QMAKE makefile variable
2013-07-03 Clifford WolfAdded Altera Quartus support to xsthammer
2013-07-03 Clifford WolfProgress in xsthammer
2013-06-26 Clifford WolfAdded vivado support to xsthammer
2013-06-23 Clifford WolfAdded SAT support for -all/-max with -verify
2013-06-20 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2013-06-20 Clifford WolfAdded timout functionality to SAT solver
2013-06-19 Clifford WolfAdded renaming of wires and cells to "rename" command
2013-06-19 Clifford WolfAdded "eval" pass
2013-06-18 Clifford WolfFixed build with clang
2013-06-18 Clifford WolfAdded splitnets command
2013-06-18 Clifford WolfAdded RTLIL::Module::fixup_ports() API and RTLIL::...
2013-06-17 Clifford WolfAdded more stuff to xsthammer, found first xst bug
2013-06-15 Clifford WolfAdded support for "assign" statements in abc vlparse
2013-06-15 Clifford WolfAdded ternary op and concat op to xsthammer
2013-06-14 Clifford WolfFixed even more ConstEval bugs found using xsthammer
2013-06-13 Clifford WolfAdded consteval testing to xsthammer and fixed bugs
2013-06-13 Clifford WolfMore xsthammer improvements (using xst 14.5 now)
2013-06-13 Clifford WolfMore fixes for bugs found using xsthammer
2013-06-12 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2013-06-12 Clifford WolfAnother fix for a bug found using xsthammer
2013-06-12 Clifford WolfAdded "scatter" command
2013-06-12 Clifford WolfRenamed yosys-show temp files to be dot-files in the...
2013-06-12 Clifford WolfFixed gcc build (c++11 stuff in ezSAT)
2013-06-11 Clifford WolfFurther improved and extended xsthammer
2013-06-10 Clifford WolfMore xsthammer improvements
2013-06-10 Clifford WolfMore sign-extension related fixes
2013-06-10 Clifford WolfSign-extension related fixes in SatGen and AST frontend
2013-06-10 Clifford WolfProgress xsthammer scripts
2013-06-10 Clifford WolfImprovements and fixes in SAT code
2013-06-10 Clifford WolfAdded history file read/write to driver
2013-06-10 Clifford WolfProgress in xsthammer: working proof for cell models
2013-06-10 Clifford WolfFixes and improvements in AST const folding
2013-06-10 Clifford WolfEnabled AST/Verilog front-end optimizations per default
2013-06-10 Clifford WolfFixed generation of newlines in "dump" output
2013-06-10 Clifford WolfAdded "rename" command
2013-06-10 Clifford WolfProgress on xsthammer
2013-06-09 Clifford WolfAdded first xsthammer scripts
2013-06-09 Clifford WolfRenamed "sat_solve" pass to "sat"
2013-06-09 Clifford WolfImplemented temporal induction proofs in sat_solve
2013-06-09 Clifford WolfAdded support for non-temporal proofs to sat_solve
2013-06-09 Clifford WolfRe-organization in sat_solver pass for temporal induction
2013-06-09 Clifford WolfAdded ezSAT api support for don't care values in models
2013-06-09 Clifford WolfFixed handling of $_XOR_ in SAT generator
2013-06-09 Clifford WolfAdded sequential solving support to sat_solve
2013-06-09 Clifford WolfSet rl_basic_word_break_characters in shell
2013-06-08 Clifford WolfImproved readline tab completion
2013-06-08 Clifford WolfLook for yosys-abc and yosys-svgviewer where the main...
2013-06-08 Clifford WolfAdded "make abc" and "make install-abc"
2013-06-08 Clifford WolfMoved cmds from kernel/ to passes/cmds/
2013-06-08 Clifford WolfFixed typo is sat_solve help msg
2013-06-08 Clifford WolfAdded support for shifter cells to SAT generator
2013-06-08 Clifford WolfAdded "cd" and "ls" commands for convenience
2013-06-08 Clifford WolfVarious improvements in sat_solve pass and SAT generator
2013-06-08 Clifford WolfAdded -all and -max options to sat_solve
2013-06-08 Clifford WolfFixes and improvements in ezSAT library
2013-06-08 Clifford WolfImproved auto-detection of -show signals in sat_solve
2013-06-07 Clifford WolfImproved sat generator and sat_solve pass
2013-06-07 Clifford WolfAdded SAT generator and simple sat_solve command
2013-06-07 Clifford WolfAdded ezSAT library
2013-06-05 Clifford WolfRenamed opt_rmunused to opt_clean
2013-06-03 Clifford WolfImplemented technology mapping for multipliers (using...
2013-06-02 Clifford WolfAdded "dump" command (part ilang backend)
2013-05-26 Clifford WolfFixed techmap/flatten for positional module arguments
2013-05-26 Clifford WolfImproved log messages generated by hierarchy pass
2013-05-24 Clifford WolfAdded -nodetect option to fsm pass
2013-05-24 Clifford WolfFixed undef behavior in tests/asicworld/code_verilog_tu...
2013-05-24 Clifford WolfImproved FSM one-hot encoding, added binary encoding
2013-05-24 Clifford WolfAdded log_assert() api
2013-05-24 Clifford WolfAdded log_abort() api
2013-05-23 Clifford WolfFixed a gcc vs. clang determinism problem in abc pass
2013-05-23 Clifford WolfFixed memory corruption bug in opt_rmunused
2013-05-23 Clifford WolfOnly initialize TCL interpreter when needed
2013-05-23 Clifford WolfFixed memory leak in ilang frontend
2013-05-23 Clifford WolfAdded missing newline to some error messages
2013-05-23 Clifford WolfAdded labels to "help -write-tex-command-reference...
2013-05-23 Clifford WolfAdded support for processes to show command
2013-05-23 Clifford WolfFixed show command for constant assignments
2013-05-23 Clifford WolfSome improvements in opt_rmdff
2013-05-19 Clifford WolfMerge pull request #6 from hansiglaser/master
2013-05-19 Johann Glaseradded option '-Dname[=definition]' to command 'read_ver...
2013-05-17 Clifford WolfRemoved test cases that have been moved to yosys-test.
2013-05-17 Clifford WolfFixed to aggressive x-folding in opt_const
2013-05-16 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2013-05-16 Clifford WolfMerge branch 'bugfix'
2013-05-16 Clifford WolfFixed synthesis of functions in latched blocks
2013-05-14 Clifford WolfImproved vcdcd.pl (added -d option)
2013-05-14 Clifford WolfSome improvements in vcdcd.pl
2013-05-07 Clifford WolfAdded support for verilog === operator
2013-05-02 Clifford WolfAdded tcl "yosys -import" command
2013-05-01 Clifford WolfImproved/simplified TCL bindings
2013-04-27 Clifford WolfAdded support for const cell inputs in techmap
2013-04-27 Clifford WolfFixed README for new show command behavior (svg vs...
2013-04-26 Clifford WolfAdded "flatten" pass
2013-04-26 Clifford WolfFixed handling of positional module parameters
next