2019-12-10 |
Gabe Black | arch: Get rid of the now unused setSyscallArg. |
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2019-12-10 |
Gabe Black | arch: Stop using setSyscallArg to set argc and argv. |
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2019-12-10 |
Gabe Black | sim: Add a wrapper/subclass for SyscallDesc which uses... |
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2019-12-10 |
Gabe Black | sim: Add a mechanism to translate ABIs to call host... |
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2019-12-10 |
Gabe Black | sim: Get rid of the now unused SyscallDesc flags and... |
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2019-12-10 |
Gabe Black | arch: Use ignoreWarnOnceFunc instead of the WarnOnce... |
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2019-12-10 |
Gabe Black | sim: Reintroduce the ignoreWarnOnceFunc syscall handler. |
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2019-12-10 |
Gabe Black | sim: Make the syscalls use the SyscallReturn suppressio... |
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2019-12-10 |
Adrian Herrera | dev-arm: GenericTimer, configurable base and low freqs |
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2019-12-10 |
Adrian Herrera | dev-arm: GenericTimer, freq as 32-bit value |
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2019-12-10 |
Giacomo Travaglini | arch-arm: Disambuiguate NumFloatV7ArchRegs usage |
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2019-12-10 |
Giacomo Travaglini | arch-arm: Unify VLdmStm behaviour when reg out of index |
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2019-12-10 |
Giacomo Travaglini | arch-arm: Fix NumVecV7ArchRegs value (64->16) |
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2019-12-10 |
Giacomo Travaglini | arch-arm: Reorder arch/arm/registers.hh constants |
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2019-12-10 |
Giacomo Travaglini | arch-arm: Replace NumFloatV8ArchRegs with NumVecV8ArchRegs |
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2019-12-09 |
Giacomo Travaglini | tests: AArch64 Linux as quick regressions (instead... |
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2019-12-09 |
Giacomo Travaglini | mem: Add Request::isMasked to check for byte strobing |
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2019-12-09 |
Giacomo Travaglini | mem: Add byteEnable copy to Request copy constructor |
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2019-12-09 |
Rahul Thakur | tests: Increase jenkins test timeout to 4 hours. |
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2019-12-08 |
Alec Roelke | arch-riscv: set MaxMiscDestRegs to 2 |
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2019-12-07 |
Gabe Black | scons: Set the partial linking group for EXTRAS dirs. |
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2019-12-07 |
Gabe Black | scons: Fixes to improve python 3 support. |
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2019-12-06 |
Daniel R. Carvalho | util: Add a git commit-msg hook |
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2019-12-06 |
Gabe Black | kvm,arm: Update the KVM ARM v8 CPU to use vector regs. |
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2019-12-06 |
Xin Ouyang | arch-riscv: fix asmtest concurrent issues. |
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2019-12-05 |
Andrea Mondelli | arch-x86: missing override specifier |
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2019-12-05 |
marjanfariborz | arch-x86: Adding LDDQU instruction |
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2019-12-04 |
Gabe Black | sim: Add a suppression mechanism to the SyscallReturn... |
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2019-12-04 |
Gabe Black | sim: Small style fixes in sim/syscall_return.hh. |
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2019-12-04 |
Gabe Black | sim: Change the syscall executor to a std::function. |
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2019-12-04 |
Gabe Black | sparc: Fix the getresuidFunc prototype. |
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2019-12-04 |
Gabe Black | sparc: Fix the predecoder's moreBytes method. |
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2019-12-03 |
Gabe Black | systemc: Purposefully *expose* bind in the initiator... |
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2019-12-03 |
Gabe Black | fastmodel: Switch the diagnostic pragmas to GCC from... |
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2019-12-03 |
Bobby R. Bruce | misc: CONTRIBUTING.md to advise linking Jira Issues... |
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2019-12-03 |
Brandon Potter | cpu,sim-se: move error checks in syscall methods |
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2019-12-03 |
Gabe Black | systemc,fastmodel: Use the gem5_scons error and warning... |
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2019-12-03 |
Gabe Black | systemc: Suppress a spurious clang warning in the syste... |
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2019-12-03 |
Gabe Black | systemc: Fix up some lingering Accellera specific code... |
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2019-12-03 |
Ciro Santilli | base: add the FmtStackTrace debug option |
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2019-12-03 |
Giacomo Travaglini | sim-se: Avoid function overloading for syscall implemen... |
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2019-12-03 |
Gabe Black | systemc: Add a bunch of missing overrides to the system... |
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2019-12-03 |
Gabe Black | fastmodel: Suppress a spurious warning on clang for... |
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2019-12-01 |
Ian Jiang | arch-riscv: Fix disassembling of immediate for c.lui... |
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2019-11-28 |
Ciro Santilli | dev-arm: Automatically assign PCI device ids in attachP... |
commit | commitdiff | tree |
2019-11-28 |
Adrian Herrera | dev-arm: device name in AmbaFake accesses |
commit | commitdiff | tree |
2019-11-28 |
Gabe Black | mem-cache: Avoid hiding a virtual method in the diction... |
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2019-11-28 |
Gabe Black | mem-cache: Remove a std::move clang says is unnecessary. |
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2019-11-28 |
Gabe Black | arm: Make sure not to shift off of the end of a uint32_... |
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2019-11-27 |
Giacomo Travaglini | base, python: Allow dirname selection for the interpreter |
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2019-11-27 |
Giacomo Travaglini | configs: Add --redirects for syscall emulation |
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2019-11-27 |
Giacomo Travaglini | base: Fix DPRINTF_UNCONDITIONAL on gem5.fast |
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2019-11-27 |
Giacomo Travaglini | configs: Add root redirect path in SE mode only when set |
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2019-11-27 |
Giacomo Travaglini | sim-se: Check Path redirection when mmapping |
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2019-11-27 |
Giacomo Travaglini | configs: Fix baremetal platform |
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2019-11-26 |
Ciro Santilli | sim: prefix --debug-flags Event logs with the flag... |
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2019-11-26 |
Ciro Santilli | cpu: prefix ExecEnable to the native trace to match... |
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2019-11-26 |
Ciro Santilli | base: generalize ExecTicks to all messages with FmtTicksOff |
commit | commitdiff | tree |
2019-11-26 |
Ciro Santilli | base: create DPRINTF_UNCONDITIONAL |
commit | commitdiff | tree |
2019-11-26 |
Ciro Santilli | base: add the --debug-flag to DPRINTF output with FmtFlag |
commit | commitdiff | tree |
2019-11-26 |
Giacomo Travaglini | arch-arm: Make the Tarmac parsed registers case insensitive |
commit | commitdiff | tree |
2019-11-26 |
Ian Jiang | arch-riscv: Fix immediate decoding for integer shift... |
commit | commitdiff | tree |
2019-11-26 |
Ian Jiang | arch-riscv: Fix disassembling for fence and fence.i |
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2019-11-26 |
Gabe Black | arch,cpu: Get rid of ISA_HAS_CC_REGS and its associated... |
commit | commitdiff | tree |
2019-11-25 |
Gabe Black | arm: Stop serializing ISA values wihch are cached from... |
commit | commitdiff | tree |
2019-11-25 |
Adrian Herrera | arch-arm: default MIDR for Armv8 ISA processors |
commit | commitdiff | tree |
2019-11-25 |
Giacomo Travaglini | dev-arm: Adjust off_chip ranges in VExpress_GEM5 platform |
commit | commitdiff | tree |
2019-11-25 |
Ciro Santilli | cpu: log thread activate and suspend with --debug-flags... |
commit | commitdiff | tree |
2019-11-25 |
Ciro Santilli | sim-se: don't wake up threads that are halted on futex |
commit | commitdiff | tree |
2019-11-25 |
Ian Jiang | arch-riscv: Fix disassembling for atomic instructions |
commit | commitdiff | tree |
2019-11-25 |
Ian Jiang | arch-riscv: Fix disassembling of operand list for compr... |
commit | commitdiff | tree |
2019-11-25 |
Ian Jiang | arch-riscv: Fix disassembling of immediate for U-type... |
commit | commitdiff | tree |
2019-11-22 |
IanJiangICT | arch-riscv: Fix bug in serialize and unserialize of... |
commit | commitdiff | tree |
2019-11-21 |
Gabe Black | scons: Use the new error() and warning() methods. |
commit | commitdiff | tree |
2019-11-21 |
Gabe Black | scons: Add "warning" and "error" methods. |
commit | commitdiff | tree |
2019-11-21 |
Gabe Black | scons: Use HAVE_PROTOC when building protobuf files. |
commit | commitdiff | tree |
2019-11-21 |
Gabe Black | scons: Don't use PROTOC for the protoc command and... |
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2019-11-21 |
Bobby R. Bruce | tests,base: Added GTests for exec_ecoff.h and exec_aout.h |
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2019-11-21 |
Bobby R. Bruce | test,base: Added GTest for base/loader/image_file_data.cc |
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2019-11-21 |
Giacomo Travaglini | base: Remove tests making use of Big/LittleEndianOrder... |
commit | commitdiff | tree |
2019-11-20 |
Brandon Potter | base,tests: Expanded GTests for addr_range.hh |
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2019-11-20 |
Ciro Santilli | system-arm: gitignore the aarch64 bootloader object... |
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2019-11-20 |
Ciro Santilli | system-arm: ignore .gen directory that contains DTS... |
commit | commitdiff | tree |
2019-11-20 |
Bertrand Marquis | system-arm: Use dts include instead of cpp in ARM DTBs |
commit | commitdiff | tree |
2019-11-20 |
Bertrand Marquis | system-arm: Rework boot loader makefile to be more... |
commit | commitdiff | tree |
2019-11-20 |
Bobby R. Bruce | tests, base: Added GTests for base/intmath.cc |
commit | commitdiff | tree |
2019-11-20 |
Mahyar Samani | tests, base: Removed dead code from base/intmath |
commit | commitdiff | tree |
2019-11-18 |
Gabe Black | arch: Get rid of the (Big|Little)EndianGuest namespaces. |
commit | commitdiff | tree |
2019-11-18 |
Gabe Black | arch: Make and use endian specific versions of the... |
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2019-11-18 |
Adrian Herrera | arch-arm: R/W interface to AArch32 HCR2 misc reg |
commit | commitdiff | tree |
2019-11-18 |
Isaac Sánchez... | mem-cache: Initialize all members of `QueuedPrefetcher... |
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2019-11-18 |
Isaac Sánchez... | mem-cache: Fix destructor of `BasePrefetcher::PrefetchI... |
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2019-11-18 |
Giacomo Travaglini | arch-arm: Fix short descriptors cacheability during... |
commit | commitdiff | tree |
2019-11-18 |
Giacomo Travaglini | arch-arm: Fix long descriptors cacheability during... |
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2019-11-16 |
Bobby R. Bruce | tests: Added GTests for byteswap.hh |
commit | commitdiff | tree |
2019-11-14 |
Giacomo Travaglini | tests: Specify a non-default root folder for regressions |
commit | commitdiff | tree |
2019-11-14 |
Mahyar Samani | tests, base: Removed ambiguity from base/intmath.hh |
commit | commitdiff | tree |
2019-11-14 |
Chun-Chen TK Hsu | arch-arm: Refactor code to check if gic is GicV2 |
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2019-11-14 |
Chun-Chen TK Hsu | config: Add fastmodel cluster in fs_bigLITTLE.py |
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2019-11-14 |
Chun-Chen TK Hsu | fastmodel: Add VExpressFastmodel platform |
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