yosys.git
2020-02-27 Claire WolfMerge pull request #1708 from rqou/coolrunner2-buf-fix
2020-02-27 Piotr Binkowskixilinx: mark IOBUFDSE3 IOB pin as external
2020-02-26 Miodrag MilanovićMerge pull request #1705 from YosysHQ/logger_pass
2020-02-26 Miodrag MilanovicRemove tests for now
2020-02-23 Miodrag MilanovicAdd tests for logger pass
2020-02-23 Miodrag MilanovicRemove duplicate warning detection
2020-02-23 Miodrag MilanovicFix line endings
2020-02-22 Eddie HungMerge pull request #1715 from boqwxp/master
2020-02-22 Miodrag MilanovicUpdate explanation for expect-no-warnings
2020-02-22 Miodrag MilanovicHandle expect no warnings together with expected
2020-02-22 Miodrag MilanovicCheck other regex parameters
2020-02-22 Alberto GonzalezCloses #1714. Fix make failure when NDEBUG=1.
2020-02-21 Eddie HungMerge pull request #1703 from YosysHQ/eddie/specify_improve
2020-02-20 Claire WolfMerge pull request #1642 from jjj11x/jjj11x/sv-enum
2020-02-20 Miodrag Milanoviccheck for regex errors
2020-02-19 Eddie Hungverilog: add support for more delays than just rise...
2020-02-19 Eddie Hungclean: ignore specify-s inside cells when determining...
2020-02-17 Miodrag MilanovicPrevent double error message
2020-02-17 Miodrag MilanovicOption to expect no warnings
2020-02-17 Miodrag MilanovicAdd to changelog
2020-02-17 Miodrag MilanovicNo new error if already failing
2020-02-17 Jeff Wangupdate documentation for enums and typedefs
2020-02-17 Jeff Wangremove unnecessary blank line
2020-02-17 Jeff Wangadd attributes for enumerated values in ilang
2020-02-17 Jeff Wangseparate out enum_item/param implementation when they...
2020-02-17 R. Oucoolrunner2: Separate and improve buffer cell insertion...
2020-02-15 Marcin Kościelnickitests/aiger: Add missing .gitignore
2020-02-15 Tim 'mithro... show: Add -nobg argument.
2020-02-15 Miodrag MilanovićMerge pull request #1706 from YosysHQ/mmicko/remove_exe...
2020-02-15 Miodrag MilanovicRemove executable flag from files
2020-02-15 Miodrag MilanovićAdd comment for macOS dependency install
2020-02-15 Eddie HungRevert "abc9: fix abc9_arrival for flops"
2020-02-14 Miodrag Milanovicremove whitespace
2020-02-14 Miodrag MilanovicAdd expect option to logger command
2020-02-14 Miodrag MilanovićMerge pull request #1701 from nakengelhardt/rpc-test
2020-02-14 Eddie Hungverilog: ignore ranges too without -specify
2020-02-14 Eddie HungMerge pull request #1700 from YosysHQ/eddie/abc9_fixes
2020-02-14 Eddie HungMerge pull request #1699 from YosysHQ/eddie/fix_iopad_init
2020-02-13 Eddie HungFine tune #1699 tests
2020-02-13 Eddie Hungiopadmap: fixes as suggested by @mwkmwkmwk
2020-02-13 Eddie Hungverilog: improve specify support when not in -specify...
2020-02-13 Eddie Hungverilog: ignore '&&&' when not in -specify mode
2020-02-13 Eddie Hungspecify: system timing checks to accept min:typ:max...
2020-02-13 Eddie Hungverilog: fix $specify3 check
2020-02-13 Eddie Hungwrite_xaiger: default value for abc9_init
2020-02-13 Eddie Hungabc9: fix abc9_arrival for flops
2020-02-13 Eddie Hungabc9: deprecate abc9_ff.init wire for (* abc9_init...
2020-02-13 Eddie Hungiopadmap: move \init attributes from outpad output...
2020-02-13 N. Engelhardtmake rpc frontend unix socket test less fragile
2020-02-13 Claire WolfMerge pull request #1694 from rqou/json_compat_fix
2020-02-13 Miodrag MilanovicAdd new logger pass
2020-02-13 N. EngelhardtMerge pull request #1679 from thasti/delay-parsing
2020-02-10 Eddie Hungabc9: cleanup
2020-02-10 Eddie HungMerge pull request #1670 from rodrigomelo9/master
2020-02-10 N. EngelhardtMerge pull request #1669 from thasti/pyosys-attrs
2020-02-09 whitequarkMerge pull request #1695 from whitequark/manual-explain...
2020-02-09 whitequarkmanual: explain RTLIL::Wire::{upto,offset}.
2020-02-09 R. Oujson: Change compat mode to directly emit ints <= 32...
2020-02-07 Eddie HungRemove unnecessary comma
2020-02-07 Eddie HungMerge pull request #1687 from YosysHQ/eddie/fix_ystests
2020-02-07 Eddie Hungtechmap: fix shiftx2mux decomposition
2020-02-07 Eddie HungFix misc.abc9.abc9_abc9_luts
2020-02-07 Marcin Kościelnickixilinx: Add support for LUT RAM on LUT4-based devices.
2020-02-07 Marcin Kościelnickixilinx: Initial support for LUT4 devices.
2020-02-07 Eddie HungMerge pull request #1685 from dh73/gowin
2020-02-07 whitequarkMerge pull request #1683 from whitequark/write_verilog...
2020-02-07 Marcin Kościelnickixilinx: Add block RAM mapping for Virtex 2* and Spartan 3*.
2020-02-07 Marcin Kościelnickixilinx: Add support for Spartan 3A DSP block RAMs.
2020-02-06 Eddie HungMerge pull request #1684 from YosysHQ/eddie/xilinx_arit...
2020-02-06 Diego HRemoving cells_sim.v from bram techmap pass
2020-02-06 Eddie HungFix $lcu -> MUXCY mapping, credit @mwkmwkmwk
2020-02-06 Eddie HungFix/cleanup +/xilinx/arith_map.v
2020-02-06 Marcin Kościelnickiedif: more resilience to mismatched port connection...
2020-02-06 whitequarkwrite_verilog: dump $mem cell attributes.
2020-02-06 Rodrigo Alejandro... Added 'set -e' into tests/memfile/run-test.sh
2020-02-06 Rodrigo Alejandro... Modified $readmem[hb] to use '\' or '/' according the OS
2020-02-06 Eddie HungMerge pull request #1682 from YosysHQ/eddie/opt_after_t...
2020-02-06 Eddie Hungsynth_*: call 'opt -fast' after 'techmap'
2020-02-06 Eddie Hungshiftx2mux: fix select out of bounds
2020-02-05 Eddie HungMerge pull request #1576 from YosysHQ/eddie/opt_merge_init
2020-02-05 Eddie HungMerge pull request #1650 from YosysHQ/eddie/shiftx2mux
2020-02-05 Eddie Hungabc9_ops: -reintegrate to use derived_type for box_ports
2020-02-05 Eddie HungMerge remote-tracking branch 'origin/master' into eddie...
2020-02-05 Eddie HungMerge pull request #1638 from YosysHQ/eddie/fix1631
2020-02-05 Eddie HungMerge pull request #1661 from YosysHQ/eddie/abc9_required
2020-02-03 Stefan Biereigeladd testcase for #1614
2020-02-03 Stefan Biereigelcorrect wire declaration grammar for #1614
2020-02-03 Stefan Biereigelremove namespace mention from inheritance information
2020-02-03 Stefan Biereigelexpose polymorphism through python wrappers
2020-02-03 Rodrigo A.... Merge branch 'master' into master
2020-02-03 Marcelina KościelnickaAdd opt_lut_ins pass. (#1673)
2020-02-03 Rodrigo Alejandro... Merge branch 'master' of https://github.com/YosysHQ...
2020-02-03 Rodrigo Alejandro... Replaced strlen by GetSize into simplify.cc
2020-02-02 David ShahMerge pull request #1516 from YosysHQ/dave/dotstar
2020-02-02 David ShahUpdate CHANGELOG and README
2020-02-02 David Shahsv: Improve handling of wildcard port connections
2020-02-02 David Shahsv: More tests for wildcard port connections
2020-02-02 David Shahhierarchy: Correct handling of wildcard port connection...
2020-02-02 David Shahsv: Add tests for wildcard port connections
2020-02-02 David Shahhierarchy: Resolve SV wildcard port connections
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