yosys.git
2022-05-23 Miodrag MilanovicUpdate verific command file documentation
2022-05-23 Miodrag MilanovicUse analysis mode if set in file
2022-05-23 Miodrag MilanovićMerge pull request #3331 from YosysHQ/git_rev_fix
2022-05-23 Jannis HarderChange way to get commit sha
2022-05-23 gatecatabc9_ops: Don't leave unused derived modules lying...
2022-05-21 github-actions... Bump version
2022-05-20 Jannis HarderMerge pull request #3324 from jix/confusing-select...
2022-05-19 Jannis Harderselect: Fix -assert-none and -assert-any error output...
2022-05-19 github-actions... Bump version
2022-05-18 Marcelina KościelnickaAdd memory_bmux2rom pass.
2022-05-18 Marcelina KościelnickaAdd memory_libmap tests.
2022-05-18 Marcelina Kościelnickagatemate: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickamachxo2: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickaefinix: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickaanlogic: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickaice40: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickaxilinx: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickagowin: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickanexus: Use `memory_libmap` pass.
2022-05-18 Marcelina Kościelnickaecp5: Use `memory_libmap` pass.
2022-05-18 Marcelina KościelnickaAdd memory_libmap pass.
2022-05-18 Marcelina Kościelnickaproc_rom: Add special handling of const-0 address bits.
2022-05-18 github-actions... Bump version
2022-05-17 Miodrag MilanovićMerge pull request #3310 from robinsonb5-PRs/master master
2022-05-17 Marcelina Kościelnickaopt_ffinv: Use ModIndex instead of ModWalker.
2022-05-16 Alastair M... Use log_warning when Tcl_Init fails, report error with...
2022-05-16 Jannis HarderMerge pull request #3314 from jix/sva_value_change_logi...
2022-05-14 github-actions... Bump version
2022-05-13 Marcelina KościelnickaAdd opt_ffinv pass.
2022-05-13 github-actions... Bump version
2022-05-12 Marcelina KościelnickaAdd proc_rom pass.
2022-05-11 Jannis Harderverific: Use new value change logic also for $stable...
2022-05-10 Alastair M... Now calls Tcl_Init after creating the interp, fixes...
2022-05-10 github-actions... Bump version
2022-05-09 Jannis HarderMerge pull request #3305 from jix/sva_value_change_logic
2022-05-09 Jannis HarderMerge pull request #3297 from jix/sva_nested_clk_else
2022-05-09 Jannis Harderverific: Improve logic generated for SVA value change...
2022-05-09 Miodrag MilanovicNext dev cycle
2022-05-09 Miodrag MilanovicRelease version 0.17 yosys-0.17
2022-05-09 Miodrag MilanovicUpdate CHANGELOG
2022-05-09 Miodrag MilanovicUpdate manual
2022-05-09 Miodrag MilanovićMerge pull request #3299 from YosysHQ/mmicko/sim_memory
2022-05-09 Miodrag MilanovicFix running sva tests
2022-05-08 github-actions... Bump version
2022-05-07 Marcelina Kościelnickaopt_mem: Remove constant-value bit lanes.
2022-05-07 github-actions... Bump version
2022-05-06 Miodrag Milanovicinclude latest abc changes
2022-05-06 Miodrag Milanovicinclude latest abc changes
2022-05-06 Miodrag MilanovićMerge pull request #3300 from imhcyx/master
2022-05-06 Miodrag MilanovicInclude abc change to fix FreeBSD build
2022-05-06 Miodrag MilanovicHandle possible non-memory indexed data
2022-05-05 imhcyxmemory_share: fix wrong argidx in extra_args
2022-05-05 github-actions... Bump version
2022-05-04 Marcelina Kościelnickaabc: Use dict/pool instead of std::map/std::set
2022-05-04 Miodrag Milanovicmap memory location to wire value, if memory is convert...
2022-05-04 Miodrag Milanovicfix crash when no fst input
2022-05-04 Miodrag MilanovicStart restoring memory state from VCD/FST
2022-05-04 Claire Xenia... Add propagated clock signals into btor info file
2022-05-03 Jannis Harderverific: Fix conditions of SVAs with explicit clocks...
2022-05-03 github-actions... Bump version
2022-05-02 Miodrag MilanovicAIM file could have gaps in or between inputs and inits
2022-04-30 github-actions... Bump version
2022-04-29 Miodrag MilanovićMerge pull request #3294 from YosysHQ/micko/verific_mer...
2022-04-29 Miodrag MilanovicIgnore merging past ffs that we are not properly merging
2022-04-26 github-actions... Bump version
2022-04-25 Rick LuikenAdd missing parameters for ecp5
2022-04-25 Jannis HarderMerge pull request #3287 from jix/smt2-conditional...
2022-04-25 Jannis HarderMerge pull request #3257 from jix/tribuf-formal
2022-04-25 Miodrag MilanovićMerge pull request #3290 from mpasternacki/bugfix/freeb...
2022-04-25 Miodrag MilanovićMerge pull request #3289 from YosysHQ/micko/sim_improve
2022-04-24 Maciej PasternackiFix build on FreeBSD, which has no alloca.h
2022-04-22 Miodrag MilanovicMatch $anyseq input if connected to public wire
2022-04-22 Miodrag MilanovicTreat $anyseq as input from FST
2022-04-22 Miodrag MilanovicIgnore change on last edge
2022-04-22 Miodrag MilanovicLast sample from input does not represent change
2022-04-22 Miodrag Milanoviclatches are always set to zero
2022-04-22 Miodrag MilanovicIf not multiclock, output only on clock edges
2022-04-22 Miodrag MilanovicSet init state for all wires from FST and set past
2022-04-22 Miodrag MilanovicFix multiclock for btor2 witness
2022-04-20 Jannis Hardersmt2: Make write port array stores conditional on nonze...
2022-04-19 github-actions... Bump version
2022-04-18 Miodrag MilanovićMerge pull request #3280 from YosysHQ/micko/fix_readaiw
2022-04-18 Miodrag MilanovicUpdate abc
2022-04-18 Miodrag Milanovicverific: allow memories to be inferred in loops (vhdl)
2022-04-18 Miodrag MilanovićMerge pull request #3282 from nakengelhardt/verific_loo...
2022-04-16 github-actions... Bump version
2022-04-15 Marcelina Kościelnickamemory_share: Fix up mismatched address widths.
2022-04-15 Marcelina Kościelnickaopt_dff: Fix behavior on $ff with D == Q.
2022-04-15 N. Engelhardtverific: allow memories to be inferred in loops
2022-04-15 Miodrag MilanovicFix reading aiw from other solvers
2022-04-12 Jannis Hardertribuf: `-formal` option: convert all to logic and...
2022-04-09 github-actions... Bump version
2022-04-08 Miodrag MilanovićMerge pull request #3275 from YosysHQ/micko/clk2fflogic_fix
2022-04-08 Miodrag MilanovicUse wrap_async_control_gate if ff is fine
2022-04-08 Miodrag MilanovićMerge pull request #3273 from modwizcode/fix-build
2022-04-08 Aki Van Nesspass jny: flipped the defaults for the inclusion of...
2022-04-08 Aki Van Nesspass jny: ensured the cell collection is cleared betwee...
2022-04-08 Aki Van Nesspass jny: fixed missing quotes around the type value...
2022-04-08 Aki Van Nesspass jny: fixed the backslash escape for strings
2022-04-08 Aki Van Nesspass jny: removed the invalid json escapes
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