yosys.git
2021-02-23 Robert Baruchint -> bool
2021-02-23 Robert BaruchAdds is_wire to SigBit and SigChunk
2021-02-23 William D.... machxo2: Switch to LUT4 sim model which propagates...
2021-02-23 William D.... machxo2: Update tribuf test to reflect active-low OE.
2021-02-23 William D.... machxo2: Add experimental status to help.
2021-02-23 William D.... machxo2: Add DCCA and DCMA blackbox primitives.
2021-02-23 William D.... machxo2: Fix reversed interpretation of REG_SD config...
2021-02-23 William D.... machxo2: Tristate is active-low.
2021-02-23 William D.... machxo2: Fix typos in FACADE_FF sim model.
2021-02-23 William D.... machxo2: Fix naming of TRELLIS_IO ports to match PIO...
2021-02-23 William D.... machxo2: Improve help_mode output in synth_machxo2.
2021-02-23 William D.... machxo2: Use attrmvcp pass to move LOC and src attribut...
2021-02-23 William D.... machxo2: Add missing OSCH oscillator primitive.
2021-02-23 William D.... machxo2: Add believed-to-be-correct tribuf test.
2021-02-23 William D.... machxo2: Add passing fsm, mux, and shifter tests.
2021-02-23 William D.... machxo2: Add add_sub test. Fix tests to include FACADE_...
2021-02-23 William D.... machxo2: Add -noiopad option to synth_machxo2.
2021-02-23 William D.... machxo2: Use correct INITVAL for LUT1 in FACADE_SLICE.
2021-02-23 William D.... machxo2: Fix cells_sim typo where OFX1 was multiply...
2021-02-23 William D.... machxo2: synth_machxo2 now maps ports to FACADE_IO.
2021-02-23 William D.... machxo2: Add initial value for Q in FACADE_FF.
2021-02-23 William D.... machxo2: Add FACADE_IO simulation model. More comments...
2021-02-23 William D.... machxo2: Add FACADE_SLICE simulation model.
2021-02-23 William D.... machxo2: Improve FACADE_FF simulation model.
2021-02-23 William D.... machxo2: Improve LUT4 techmap. Use same output port...
2021-02-23 William D.... machxo2: Add dffe test.
2021-02-23 William D.... machxo2: Add dff.ys test, fix another cells_map.v typo.
2021-02-23 William D.... machxo2: Fix more oversights in machxo2 models. logic...
2021-02-23 William D.... machxo2: Add test/arch/machxo2 directory (test does...
2021-02-23 William D.... machxo2: Fix typos. test/arch/run-test.sh passes.
2021-02-23 William D.... machxo2: Create basic techlibs and synth_machxo2 pass.
2021-02-22 Karol Gugalafrontend: json: parse negative values
2021-02-22 Marcelina Kościelnickaassertpmux: Fix crash on unused $pmux output.
2021-02-21 whitequarkMerge pull request #2586 from zachjs/tern-recurse
2021-02-21 whitequarkMerge pull request #2591 from zachjs/verilog-preproc...
2021-02-19 Zachary Snowverilog: error on macro invocations with missing argume...
2021-02-18 Yosys BotBump version
2021-02-17 Claire XenMerge pull request #2590 from RobertBaruch/fix_fast_sop...
2021-02-17 Robert BaruchFixes command line for abc pass in -fast -sop mode
2021-02-16 Yosys BotBump version
2021-02-15 Claire XenMerge pull request #2574 from dh73/master
2021-02-13 Yosys BotBump version
2021-02-12 Zachary Snowverilog: support recursive functions using ternary...
2021-02-12 gatecatMerge pull request #2585 from YosysHQ/dave/nexus-dotproduct
2021-02-12 Miodrag MilanovicGanulate Verific support
2021-02-12 Yosys BotBump version
2021-02-11 whitequarkMerge pull request #2573 from zachjs/repeat-call
2021-02-11 Zachary SnowMerge pull request #2578 from zachjs/genblk-port
2021-02-11 Zachary SnowMerge pull request #2584 from antmicro/atom_type_signedness
2021-02-11 Kamil RakoczyAdd missing is_signed to type_atom
2021-02-07 Zachary Snowverlog: allow shadowing module ports within generate...
2021-02-07 Yosys BotBump version
2021-02-06 whitequarkMerge pull request #2576 from zachjs/port-bind-sign...
2021-02-06 Zachary Snowgenrtlil: fix signed port connection codegen failures
2021-02-06 Yosys BotBump version
2021-02-05 whitequarkMerge pull request #2572 from antmicro/check-labels
2021-02-05 Yosys BotBump version
2021-02-04 Diego HAccept disable case for SVA liveness properties.
2021-02-04 Kamil RakoczyAdd check of begin/end labels for genblock
2021-02-04 Zachary Snowverilog: refactored constant function evaluation
2021-02-04 whitequarkMerge pull request #2529 from zachjs/unnamed-genblk
2021-02-04 Yosys BotBump version
2021-02-03 whitequarkMerge pull request #2436 from dalance/fix_generate
2021-01-31 Zachary Snowverilog: significant block scoping improvements
2021-01-31 Yosys BotBump version
2021-01-30 Miodrag MilanovicRequire latest Verific build
2021-01-30 Yosys BotBump version
2021-01-29 Marcelina Kościelnickaast: fix dump_vlog display of casex/casez
2021-01-29 whitequarkMerge pull request #2564 from whitequark/flatten-improv...
2021-01-29 Yosys BotBump version
2021-01-28 whitequarkMerge pull request #2569 from zachjs/macro-arg-surround...
2021-01-28 Claire XenMerge pull request #2535 from Ravenslofty/scc-specify
2021-01-28 Zachary Snowverilog: strip leading and trailing spaces in macro...
2021-01-27 Yosys BotBump version
2021-01-26 Marcelina Kościelnickaxilinx_dffopt: Don't crash on missing IS_*_INVERTED.
2021-01-26 Marcelina Kościelnickaxilinx: Add FDRSE_1, FDCPE_1.
2021-01-26 whitequarkMerge pull request #2563 from whitequark/cxxrtl-msvc
2021-01-26 whitequarkMerge pull request #2544 from modwizcode/fix-clock
2021-01-26 whitequarkflatten: clarify confusing error message.
2021-01-26 whitequarkcxxrtl: do not use `->template` for non-dependent names.
2021-01-26 Dan Ravensloftscc: Add -specify option to find loops in boxes
2021-01-26 Yosys BotBump version
2021-01-25 whitequarkMerge pull request #2549 from pgadfort/support-multiple...
2021-01-25 whitequarkMerge pull request #2550 from zachjs/macro-arg-spaces
2021-01-25 Yosys BotBump version
2021-01-24 Claire XenMerge pull request #2558 from YosysHQ/dave/chandle-dpi
2021-01-23 David Shahdpi: Support for chandle type
2021-01-22 Yosys BotBump version
2021-01-21 Miodrag MilanovićMerge pull request #2553 from zachjs/rand-const-modifiers
2021-01-21 Zachary SnowAllow combination of rand and const modifiers
2021-01-21 Yosys BotBump version
2021-01-20 Claire XenMerge pull request #2552 from YosysHQ/claire/yosyshq
2021-01-20 Claire Xenia... Switch verific bindings from Symbiotic EDA flavored...
2021-01-20 Miodrag MilanovićMerge pull request #2536 from TobiasFaller/master
2021-01-20 Miodrag MilanovićMerge pull request #2551 from zachjs/wire-logic
2021-01-20 Zachary Snowsv: fix support wire and var data type modifiers
2021-01-20 Zachary Snowverilog: allow spaces in macro arguments
2021-01-19 Yosys BotBump version
2021-01-18 Peter Gadfortadding support for passing multiple liberty files to abc
2021-01-18 whitequarkMerge pull request #2547 from zachjs/plugin-so-dsym
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