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yosys.git
2015-03-29
Clifford Wolf
documentation improvements
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2015-03-25
Clifford Wolf
Ignore celldefine directive in verilog front-end
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2015-03-25
Clifford Wolf
Fixes in cmos_cells.v
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2015-03-22
Clifford Wolf
Fixed detection of absolute paths in ABC for win32
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2015-03-22
Clifford Wolf
Added blif reference to appnote 010
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2015-03-20
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2015-03-20
Clifford Wolf
fix for python 2.6.6
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2015-03-18
Clifford Wolf
Fixed handling of quotes in liberty parser
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2015-03-18
Clifford Wolf
Added hierarchy -auto-top
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2015-03-18
Clifford Wolf
Added Verilog backend $dffsr support
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2015-03-06
Clifford Wolf
Documentation for JSON format, added attributes
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2015-03-05
Clifford Wolf
Added very first version of "synth_ice40"
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2015-03-04
Clifford Wolf
Fixed bug in "hierarchy" for parametric designs
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2015-03-03
Clifford Wolf
Json bugfix
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2015-03-03
Clifford Wolf
Json backend improvements
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2015-03-02
Clifford Wolf
Added write_blif -attr
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2015-03-02
Clifford Wolf
Added JSON backend
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2015-03-01
Clifford Wolf
Const-fold parameter defs on-demand in AstNode::detectS...
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2015-02-26
Clifford Wolf
Added $assume support to write_smt2
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2015-02-26
Clifford Wolf
Added non-std verilog assume() statement
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2015-02-26
Clifford Wolf
Added $assume cell type
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2015-02-25
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2015-02-25
Clifford Wolf
Bugfix in iopadmap
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2015-02-25
Clifford Wolf
Added "keep_hierarchy" attribute
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2015-02-24
Clifford Wolf
Some cleanups in "clean"
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2015-02-24
Clifford Wolf
Fixed compilation problems with gcc 4.6.3; use enum...
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2015-02-22
Clifford Wolf
Minor "write_smt2" help msg change
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2015-02-22
Clifford Wolf
Fixed "check -assert"
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2015-02-22
Clifford Wolf
Added "<mod>_a" and "<mod>_i" to write_smt2 output
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2015-02-22
Clifford Wolf
Added "check -assert" doc
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2015-02-22
Clifford Wolf
Added "check -assert"
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2015-02-22
Clifford Wolf
Fixed "sat -initsteps" off-by-one bug
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2015-02-21
Clifford Wolf
Added "sat -stepsize" and "sat -tempinduct-step"
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2015-02-21
Clifford Wolf
sat docu change
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2015-02-21
Clifford Wolf
When "sat -tempinduct-baseonly -maxsteps N" reaches...
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2015-02-21
Clifford Wolf
Added "sat -tempinduct-baseonly -tempinduct-inductonly"
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2015-02-21
Clifford Wolf
Fixed basecase init for "sat -tempinduct"
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2015-02-21
Clifford Wolf
Fixed "flatten" for non-pre-derived modules
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2015-02-21
Clifford Wolf
Hotfix for yosysjs/demo03.html
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2015-02-21
Clifford Wolf
YosysJS: Wait for Viz to load
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2015-02-21
Clifford Wolf
Replaced ezDefaultSAT with ezSatPtr
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2015-02-21
Clifford Wolf
Catch constants assigned to cell outputs in "flatten"
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2015-02-20
Clifford Wolf
Added deep recursion warning to AST simplify
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2015-02-20
Clifford Wolf
Parser support for complex delay expressions
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2015-02-19
Clifford Wolf
YosysJS firefox fixes
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2015-02-19
Clifford Wolf
YosysJS stuff
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2015-02-19
Clifford Wolf
format fixes in "sat -dump_json"
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2015-02-19
Clifford Wolf
Added "sat -dump_json" (WaveJSON format)
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2015-02-19
Clifford Wolf
Changed "show" defaults for Win32
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2015-02-18
Clifford Wolf
Convert floating point cell parameters to strings
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2015-02-18
Clifford Wolf
Fixed clang (svn trunk) warnings
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2015-02-18
Clifford Wolf
Merge branch 'master' of github.com:cliffordwolf/yosys
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2015-02-18
Clifford Wolf
Added "select %xe %cie %coe"
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2015-02-17
Clifford Wolf
wreduce help typo fix
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2015-02-17
Clifford Wolf
CodingReadme
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2015-02-16
Clifford Wolf
YosysJS fixes for firefox
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2015-02-16
Clifford Wolf
More YosysJS stuff
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2015-02-16
Clifford Wolf
Added YosysJS wrapper
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2015-02-16
Clifford Wolf
Bugfix in wreduce
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2015-02-15
Clifford Wolf
More yosys.js improvements
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2015-02-15
Clifford Wolf
Added Viz to yosys.js
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2015-02-15
Clifford Wolf
Added yosys.js FS support
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2015-02-15
Clifford Wolf
More emcc stuff
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2015-02-15
Clifford Wolf
Improved yosys.js example
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2015-02-15
Clifford Wolf
Added "stat" to "synth" and "synth_xilinx"
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2015-02-15
Clifford Wolf
Added final checks to "synth" and "synth_xilinx"
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2015-02-15
Clifford Wolf
Added "check -noinit"
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2015-02-15
Clifford Wolf
Cosmetic fixes in "hierarchy" for blackbox modules
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2015-02-15
Clifford Wolf
More emscripten stuff, Added example app
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2015-02-15
Clifford Wolf
Fixed default EMCCFLAGS
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2015-02-14
Clifford Wolf
Smaller default parameters in $mem simlib model
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2015-02-14
Clifford Wolf
Fixed "stat" handling of blackbox modules
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2015-02-14
Clifford Wolf
Various fixes for memories with offsets
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2015-02-14
Clifford Wolf
Added $meminit support to "memory" command
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2015-02-14
Clifford Wolf
Added $meminit test case
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2015-02-14
Clifford Wolf
Added "read_verilog -nomeminit" and "nomeminit" attribute
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2015-02-14
Clifford Wolf
Creating $meminit cells in verilog front-end
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2015-02-14
Clifford Wolf
Added $meminit cell type
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2015-02-14
Clifford Wolf
Fixed handling of "//" in filenames in verilog pre...
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2015-02-13
Clifford Wolf
Fixed "write_verilog -attr2comment" handling of "*...
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2015-02-13
Clifford Wolf
hotfix in "check" command
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2015-02-13
Clifford Wolf
Added "check" command
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2015-02-13
Clifford Wolf
Added AstNode::simplify() recursion counter
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2015-02-13
Clifford Wolf
Added EMCCFLAGS
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2015-02-12
Clifford Wolf
Some test related fixes
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2015-02-12
Clifford Wolf
Added "proc_dlatch"
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2015-02-10
Clifford Wolf
Less aggressive "share" defaults
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2015-02-10
Clifford Wolf
Improved read_verilog support for empty behavioral...
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2015-02-10
Clifford Wolf
Added "scc -expect <N> -nofeedback"
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2015-02-09
Clifford Wolf
Some hashlib improvements
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2015-02-09
Clifford Wolf
Various changes to release checklist
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2015-02-09
Clifford Wolf
Fixed creation of command reference in manual
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2015-02-09
Clifford Wolf
We are now in 0.5+ development
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2015-02-09
Clifford Wolf
Yosys 0.5
yosys-0.5
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2015-02-09
Clifford Wolf
Bugfix in "make vcxsrc"
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2015-02-09
Clifford Wolf
Updated command reference in manual
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2015-02-09
Clifford Wolf
Various presentation fixes
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2015-02-08
Clifford Wolf
Fixed iterator invalidation bug in "rename" command
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2015-02-08
Clifford Wolf
CodingReadme update
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2015-02-08
Clifford Wolf
Fixed bug in "show -format .."
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