gem5.git
2006-10-01 Kevin LimMerge ktlim@zamp:./local/clean/o3-merge/m5
2006-09-28 Kevin LimUpdates to Ozone CPU.
2006-09-28 Kevin LimMinor changes plus updates to O3.
2006-09-19 Steve ReinhardtAdd CoherenceProtocol object to objects list.
2006-09-19 Ali Saidiadd boiler plate intel nic code
2006-09-17 Gabe BlackAdding what was tracedump but is now statetrace to...
2006-09-17 Gabe BlackFinished changing how stat structures are translated...
2006-09-16 Gabe BlackChanges to correct stat behavior
2006-09-15 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-09-11 Ali SaidiMerge zizzer:/bk/newmem
2006-09-11 Ali Saidiadd annotation code to m5
2006-09-08 Steve ReinhardtAdded cscope-find.py utility to generate file list...
2006-09-08 Steve ReinhardtAdd support for assigning lists of ports or proxies...
2006-09-07 Steve ReinhardtUpdate port numbers from new unproxy ordering.
2006-09-07 Steve ReinhardtTry to make unproxy order more deterministic.
2006-09-06 Steve ReinhardtDelete some output files that never should have been
2006-09-06 Steve ReinhardtEnable proxies (Self/Parent) for specifying ports.
2006-09-05 Steve ReinhardtUpdate reference config.ini files to include port mappings.
2006-09-05 Steve ReinhardtPrint ports in config.ini as well.
2006-09-05 Steve ReinhardtMore Python hacking to deal with config.py split
2006-09-04 Steve ReinhardtSplit config.py into multiple files.
2006-09-04 Steve Reinhardtconfig.py:
2006-09-03 Gabe BlackMade system calls use the uid, etc parameters from...
2006-09-03 Gabe BlackFix up the parameters to getInstRecord
2006-09-03 Gabe BlackMake the ASI constants available to the decoder.
2006-09-03 Gabe BlackMake the auxiliary vectors use the uid, euid, gid and...
2006-09-03 Gabe BlackFixing up parameters of getInstRecord
2006-09-03 Gabe BlackAdded uid, euid, gid, egid, pid and ppid parameters...
2006-09-03 Gabe BlackA quick fix to isolate the tracing code to SPARC
2006-09-02 Steve Reinhardtregress:
2006-09-02 Steve ReinhardtMerge zizzer.eecs.umich.edu:/bk/newmem
2006-09-02 Steve ReinhardtGet rid of extra stuff in util/regress only needed...
2006-09-01 Steve ReinhardtAdd o3-timing configuration for ALPHA_SE "Hello world...
2006-09-01 Steve Reinhardtdiff-out:
2006-09-01 Steve ReinhardtMerge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
2006-09-01 Steve ReinhardtTweak proxy resolution error message.
2006-09-01 Korey Sewelladd ISA_HAS_DELAY_SLOT directive instead of "#if THE_IS...
2006-08-30 Steve ReinhardtMove more common functionality into SimpleTimingPort,
2006-08-30 Gabe BlackChange the cpu pointer in the InstRecord object to...
2006-08-30 Gabe BlackForgot some commas
2006-08-30 Steve ReinhardtMinor include file & formatting cleanup.
2006-08-29 Steve ReinhardtAdd FULL_SYSTEM check to example/fs.py.
2006-08-29 Steve ReinhardtAdd missing cpu mem param to example/se.py.
2006-08-29 Gabe BlackASI constants.
2006-08-29 Gabe BlackSet both xcc.c and icc.c on return from a syscall.
2006-08-29 Gabe BlackDon't store if there's a fault.
2006-08-29 Gabe BlackExtended the reg delta output.
2006-08-29 Gabe BlackFiddled with the floating point accessors.
2006-08-29 Gabe BlackCleaned up floating point by removing unnecessary conve...
2006-08-28 Steve ReinhardtClean up BAR setting code.
2006-08-28 Steve ReinhardtGet rid of unneeded union.
2006-08-28 Steve ReinhardtGet rid of unused BARAddrs[] in PciConfigData object.
2006-08-28 Steve ReinhardtCleanup: formatting, comments, DPRINTFs.
2006-08-28 Steve ReinhardtFix remote gdb buffer overflow.
2006-08-28 Steve ReinhardtMake address formats consistent in DPRINTFs.
2006-08-28 Steve ReinhardtFix command for new options processing.
2006-08-28 Steve ReinhardtAdd dup() support (from Antti Miettinen).
2006-08-25 Steve ReinhardtUpdate for 2.0 beta 1 patch 1 m5_2.0_beta1_patch1
2006-08-25 Steve ReinhardtUpdate for new regression test structure.
2006-08-24 Kevin LimUpdates to configs to support various sampling forms...
2006-08-24 Kevin LimStats updates.
2006-08-24 Kevin LimUpdated sampler stuff.
2006-08-24 Kevin LimOzone updates.
2006-08-24 Kevin LimSupport profiling.
2006-08-24 Kevin LimSwitch out fixups for the CPUs.
2006-08-24 Kevin LimUpdate checker.
2006-08-24 Kevin LimStats reset, profiling stuff.
2006-08-24 Steve ReinhardtUpdate a few bogus reference outputs
2006-08-23 Kevin LimSupport loading in a symbol file.
2006-08-22 Ron DreslinskiStill need LL/SC support in cache, add hack to always...
2006-08-22 Ron DreslinskiCommiting a version of the multi-phase snoop atomic...
2006-08-22 Ron DreslinskiMerge zizzer:/z/m5/Bitkeeper/newmem
2006-08-22 Ron DreslinskiUpdate refs for tru64 with initialized cache stats
2006-08-22 Gabe BlackFix annulled unconditional branches
2006-08-21 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-08-21 Steve ReinhardtSConstruct:
2006-08-21 Gabe BlackMerge zizzer.eecs.umich.edu:/bk/newmem
2006-08-21 Ron DreslinskiUpdate REFs for statistics patch in cache
2006-08-21 Gabe BlackGot rid of the aux_data array since it shouldn't have...
2006-08-21 Gabe BlackFixed the parameters to memset. sizeof(regSegments...
2006-08-21 Gabe BlackTwo bugs found by my tracing tool.
2006-08-21 Ron DreslinskiMerge zizzer:/z/m5/Bitkeeper/newmem
2006-08-21 Ron DreslinskiChanges so that time in the packet is actually set...
2006-08-21 Steve Reinhardtfs.py:
2006-08-21 Steve ReinhardtTEST_CPU_MODELS isn't used anymore.
2006-08-21 Steve ReinhardtAdd Alpha Linux version of "hello world" test.
2006-08-21 Steve ReinhardtAlpha "hello world" test is really Tru64 not Linux...
2006-08-21 Steve Reinhardtconfigs/example/fs.py:
2006-08-19 Steve ReinhardtSConscript:
2006-08-18 Steve ReinhardtUpdate reference outputs m5_2.0_beta1
2006-08-18 Steve ReinhardtAdd caches in, fix cpu.mem param
2006-08-18 Steve ReinhardtChanges to build m5.fast
2006-08-17 Kevin LimAdd readfile back in.
2006-08-17 Ali SaidiMerge zizzer:/bk/newmem
2006-08-17 Ali Saidiadd default range to PhysicalMemory
2006-08-17 Steve ReinhardtSConstruct:
2006-08-17 Lisa HsuAUTHORS:
2006-08-17 Lisa HsuMerge zizzer:/bk/newmem
2006-08-17 Lisa Hsumake tree rcS files reflect what we've been actually...
2006-08-17 Ali Saidiwe don't want the old memory timing dram model either
next