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yosys.git
2019-12-16 Eddie HungImplement 'attributes' grammar commit | commitdiff | tree
2019-12-16 Eddie HungMerge branch 'diego/memattr' of https://github.com... commit | commitdiff | tree
2019-12-16 Diego HFixing compiler warning/issues. Moving test script... commit | commitdiff | tree
2019-12-16 Diego HRemoving fixed attribute value to !ramstyle rules commit | commitdiff | tree
2019-12-16 Diego HMerging attribute rules into a single match block;... commit | commitdiff | tree
2019-12-16 Eddie HungMerge pull request #1575 from rodrigomelo9/master commit | commitdiff | tree
2019-12-16 Eddie HungMerge pull request #1577 from gromero/for-yosys commit | commitdiff | tree
2019-12-16 Eddie HungMerge pull request #1578 from noopwafel/eqneq-debug commit | commitdiff | tree
2019-12-15 Alyssa MilburnFix opt_expr.eqneq.cmpzero debug print commit | commitdiff | tree
2019-12-13 Diego HRefactoring memory attribute matching based on IEEE... commit | commitdiff | tree
2019-12-13 Eddie HungMerge pull request #1533 from dh73/bram_xilinx commit | commitdiff | tree
2019-12-13 Diego HRenaming BRAM memory tests for the sake of uniformity commit | commitdiff | tree
2019-12-13 Rodrigo Alejandro... Fixed some missing "verilog_" in documentation commit | commitdiff | tree
2019-12-12 Diego HFixing citation in xc7_xcu_brams.txt file. Fixing RAMB3... commit | commitdiff | tree
2019-12-12 Eddie Hungabc9_map.v: fix Xilinx LUTRAM commit | commitdiff | tree
2019-12-12 Diego HAdding a note (TODO) in the memory_params.ys check... commit | commitdiff | tree
2019-12-12 Diego HUpdating RAMB36E1 thresholds. Adding test for both... commit | commitdiff | tree
2019-12-12 Diego HMerge https://github.com/YosysHQ/yosys into bram_xilinx commit | commitdiff | tree
2019-12-12 Eddie HungUpdate README.md :: abc_ -> abc9_ commit | commitdiff | tree
2019-12-11 Eddie HungFix bitwidth mismatch; suppresses iverilog warning commit | commitdiff | tree
2019-12-11 Gustavo Romeromanual: Fix text in Abstract section commit | commitdiff | tree
2019-12-11 David ShahMerge pull request #1564 from ZirconiumX/intel_housekeeping commit | commitdiff | tree
2019-12-10 Dan Ravensloftsynth_intel: a10gx -> arria10gx commit | commitdiff | tree
2019-12-10 Dan Ravensloftsynth_intel: cyclone10 -> cyclone10lp commit | commitdiff | tree
2019-12-10 Eddie HungMerge pull request #1545 from YosysHQ/eddie/ice40_wrapc... commit | commitdiff | tree
2019-12-09 Eddie Hungice40_opt to restore attributes/name when unwrapping commit | commitdiff | tree
2019-12-09 Eddie Hungice40_wrapcarry -unwrap to preserve 'src' attribute commit | commitdiff | tree
2019-12-09 Eddie Hungunmap $__ICE40_CARRY_WRAPPER in test commit | commitdiff | tree
2019-12-09 Eddie Hung-unwrap to create $lut not SB_LUT4 for opt_lut commit | commitdiff | tree
2019-12-09 Eddie HungSensitive to direct inst of $__ICE40_CARRY_WRAPPER... commit | commitdiff | tree
2019-12-09 Eddie Hungice40_wrapcarry to really preserve attributes via ... commit | commitdiff | tree
2019-12-07 Eddie HungMerge pull request #1555 from antmicro/fix-macc-xilinx... commit | commitdiff | tree
2019-12-07 Eddie HungDrop keep=0 attributes on SB_CARRY commit | commitdiff | tree
2019-12-06 Jan Kowalewskitests: arch: xilinx: Change order of arguments in macc.sh commit | commitdiff | tree
2019-12-05 Clifford WolfMerge pull request #1551 from whitequark/manual-cell... commit | commitdiff | tree
2019-12-05 Eddie HungMerge SB_CARRY+SB_LUT4's attributes when creating ... commit | commitdiff | tree
2019-12-05 Eddie HungAdd WIP test for unwrapping $__ICE40_CARRY_WRAPPER commit | commitdiff | tree
2019-12-04 whitequarkkernel: require \B_SIGNED=0 on $shl, $sshl, $shr, ... commit | commitdiff | tree
2019-12-04 whitequarkmanual: document behavior of many comb cells more preci... commit | commitdiff | tree
2019-12-04 Marcin Kościelnickixilinx: Add tristate buffer mapping. (#1528) commit | commitdiff | tree
2019-12-04 Marcin Kościelnickiiopadmap: Refactor and fix tristate buffer mapping... commit | commitdiff | tree
2019-12-04 Marcin Kościelnickixilinx: Add models for LUTRAM cells. (#1537) commit | commitdiff | tree
2019-12-03 Eddie HungCheck SB_CARRY name also preserved commit | commitdiff | tree
2019-12-03 Eddie Hung$__ICE40_CARRY_WRAPPER to use _TECHMAP_REPLACE_ for... commit | commitdiff | tree
2019-12-03 Eddie Hungice40_opt to ignore (* keep *) -ed cells commit | commitdiff | tree
2019-12-03 Eddie Hungice40_wrapcarry to preserve SB_CARRY's attributes commit | commitdiff | tree
2019-12-03 Eddie HungAdd testcase commit | commitdiff | tree
2019-12-03 Clifford WolfMerge pull request #1524 from pepijndevos/gowindffinit commit | commitdiff | tree
2019-12-03 Pepijn de Vosupdate test commit | commitdiff | tree
2019-12-03 Pepijn de VosUse -match-init to not synth contradicting init values commit | commitdiff | tree
2019-12-02 David ShahMerge pull request #1542 from YosysHQ/dave/abc9-loop-fix commit | commitdiff | tree
2019-12-02 Clifford WolfMerge pull request #1539 from YosysHQ/mwk/ilang-bounds... commit | commitdiff | tree
2019-12-01 David Shahabc9: Fix breaking of SCCs commit | commitdiff | tree
2019-11-29 Miodrag MilanovićMerge pull request #1540 from YosysHQ/mwk/xilinx-bufpll commit | commitdiff | tree
2019-11-29 Marcin Kościelnickixilinx: Add missing blackbox cell for BUFPLL. commit | commitdiff | tree
2019-11-28 Eddie HungRevert "Fold loop" commit | commitdiff | tree
2019-11-27 Marcin Kościelnickiread_ilang: do bounds checking on bit indices commit | commitdiff | tree
2019-11-27 Diego HAdjusting Vivado's BRAM min bits threshold for RAMB18E1 commit | commitdiff | tree
2019-11-27 Eddie HungMerge pull request #1536 from YosysHQ/eddie/xilinx_dsp_... commit | commitdiff | tree
2019-11-27 Clifford WolfMerge pull request #1501 from YosysHQ/dave/mem_copy_attr commit | commitdiff | tree
2019-11-27 Clifford WolfMerge pull request #1534 from YosysHQ/mwk/opt_share-fix commit | commitdiff | tree
2019-11-27 Eddie HungMerge pull request #1535 from YosysHQ/eddie/write_xaige... commit | commitdiff | tree
2019-11-27 Eddie HungNo need for -abc9 commit | commitdiff | tree
2019-11-27 Marcin Kościelnickiopt_share: Fix handling of fine cells. commit | commitdiff | tree
2019-11-27 Eddie Hunglatch -> box commit | commitdiff | tree
2019-11-27 Eddie HungAdd citation commit | commitdiff | tree
2019-11-27 Eddie HungCheck for either sign or zero extension for postAdd... commit | commitdiff | tree
2019-11-27 Eddie HungRemove notes commit | commitdiff | tree
2019-11-27 Eddie HungFold loop commit | commitdiff | tree
2019-11-27 Eddie HungDo not sigmap keep bits inside write_xaiger commit | commitdiff | tree
2019-11-27 Eddie Hungxaiger: do not promote output wires commit | commitdiff | tree
2019-11-27 Eddie HungAdd testcase derived from fastfir_dynamictaps benchmark commit | commitdiff | tree
2019-11-26 Marcin Kościelnickixilinx: Add simulation models for IOBUF and OBUFT. commit | commitdiff | tree
2019-11-25 Marcin Kościelnickiclkbufmap: Add support for inverters in clock path. commit | commitdiff | tree
2019-11-25 Marcin Kościelnickixilinx: Use INV instead of LUT1 when applicable commit | commitdiff | tree
2019-11-25 Pepijn de Vosattempt to fix formatting commit | commitdiff | tree
2019-11-25 Pepijn de Vosgowin: add and test dff init values commit | commitdiff | tree
2019-11-23 Eddie HungMerge pull request #1520 from pietrmar/fix-1463 commit | commitdiff | tree
2019-11-23 Martin Pietrykacoolrunner2: remove spurious log_pop() call, fixes... commit | commitdiff | tree
2019-11-22 Clifford WolfMerge pull request #1517 from YosysHQ/clifford/optmem commit | commitdiff | tree
2019-11-22 Clifford WolfMerge pull request #1515 from YosysHQ/clifford/svastuff commit | commitdiff | tree
2019-11-22 Clifford WolfAdd "opt_mem" pass commit | commitdiff | tree
2019-11-22 Clifford WolfAdd Verific support for SVA nexttime properties commit | commitdiff | tree
2019-11-22 Clifford WolfImprove handling of verific primitives in "verific... commit | commitdiff | tree
2019-11-22 Clifford WolfAdd Verific SVA support for "always" properties commit | commitdiff | tree
2019-11-22 Clifford WolfMerge pull request #1511 from YosysHQ/dave/always commit | commitdiff | tree
2019-11-22 Marcin Kościelnickigowin: Remove show command from tests. commit | commitdiff | tree
2019-11-22 Marcin Kościelnickigowin: Add missing .gitignore entries commit | commitdiff | tree
2019-11-22 David ShahUpdate CHANGELOG and README commit | commitdiff | tree
2019-11-21 David Shahsv: Add tests for SV always types commit | commitdiff | tree
2019-11-21 David Shahproc_dlatch: Add error handling for incorrect always_... commit | commitdiff | tree
2019-11-21 David Shahsv: Correct parsing of always_comb, always_ff and alway... commit | commitdiff | tree
2019-11-20 Clifford WolfMerge pull request #1507 from YosysHQ/clifford/verificfixes commit | commitdiff | tree
2019-11-20 Clifford WolfCorrectly treat empty modules as blackboxes in Verific commit | commitdiff | tree
2019-11-20 Clifford WolfDo not rename VHDL entities to "entity(impl)" when... commit | commitdiff | tree
2019-11-19 Clifford WolfMerge pull request #1449 from pepijndevos/gowin commit | commitdiff | tree
2019-11-19 Pepijn de VosRemove dff init altogether commit | commitdiff | tree
2019-11-19 Marcin KościelnickiFix #1462, #1480. commit | commitdiff | tree
2019-11-19 Marcin Kościelnickixilinx: Add simulation models for MULT18X18* and DSP48A*. commit | commitdiff | tree
2019-11-18 David Shahmemory_collect: Copy attr from RTLIL::Memory to cell commit | commitdiff | tree
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