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gram.git
2022-07-23
Cesar Strauss
Remove unused Minerva CPU import from headless examples
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2022-07-23
Cesar Strauss
Do not invert DDR3 CS pin on Icarus testbench
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2022-07-23
Cesar Strauss
Use DELAYG instead of DELAYF on Icarus simulation
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2022-07-23
Cesar Strauss
Merge runsimsoc2.sh into runsimsoc.sh
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2022-04-15
Luke Kenneth...
remove pyvcd dependency, it is pulled in by nmigen...
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2022-04-15
Luke Kenneth...
add features option to gramCore and PHY wishbone buses...
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2022-04-15
Luke Kenneth...
fix reset to be xdr=4x in ECP5DDRPHY
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2022-04-15
Luke Kenneth...
connect (new) reset signal on IOPads which comes from...
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2022-04-14
Luke Kenneth...
whilst IOpads and PLLs were driving from dramsync,...
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2022-04-10
Raptor Engineering...
Don't reset the core / peripherals on DRAM controller...
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2022-04-10
Raptor Engineering...
Put sysclk2x back under system reset control
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2022-04-09
Raptor Engineering...
Avoid timing violation on ECP5 PHY PAUSE signal
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2022-04-09
Raptor Engineering...
Revert "Avoid timing violation on ECP5 PHY PAUSE signal"
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2022-04-09
Raptor Engineering...
Avoid timing violation on ECP5 PHY PAUSE signal
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2022-04-09
Raptor Engineering...
Wire up missing CRG / DDR3 clock control / reset signals
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2022-04-07
Raptor Engineering...
Re-apply part of 180026c72f0e1d3ef365b2214288d4a543a238dd
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2022-04-07
Raptor Engineering...
Backport litedram 05ed5bf59d31029d3f91c5a348cdd539a150631b
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2022-04-07
Raptor Engineering...
Working at 50MHz system clock
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2022-04-07
Raptor Engineering...
Switch CRG back over to ECP5 version
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2022-04-07
Raptor Engineering...
Partially revert GIT hash 180026c72f0e1d3ef365b2214288d...
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2022-04-07
Raptor Engineering...
Properly connect reset and cs signals
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2022-04-07
Raptor Engineering...
Add initial support for external DRAM init on the Rapto...
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2022-03-17
Luke Kenneth...
initialise bitslip with a specific value rather than...
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2022-03-17
Luke Kenneth...
add alternative variant of runsimsoc.sh
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2022-03-13
Luke Kenneth...
add 1024M_ddr3_parameters.vh for MT41K64M16
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2022-03-11
Luke Kenneth...
add a 2nd clock, this one deliberately the
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2022-03-11
Luke Kenneth...
annoyingly reverting reset_n naming back to reset
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2022-03-10
Luke Kenneth...
tidyup on gramWishbone class, add comments
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2022-03-10
Luke Kenneth...
tidy up gramWishbone constructor, pass Wishbone feature...
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2022-03-10
Luke Kenneth...
code-cleanup and copyright notices
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2022-03-01
Luke Kenneth...
fix up simulation to be more like VERSA_ECP5
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2022-02-28
Luke Kenneth...
remove unneeded import
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2022-02-26
Luke Kenneth...
use dict for lookup of DFI to pads names
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2022-02-26
Luke Kenneth...
add missing reset-HI values to cas_n, cs_n, we_n and...
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2022-02-25
Luke Kenneth...
get chipselect (cs_n) name right in ECP5DDRPHY
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2022-02-25
Luke Kenneth...
restore naming convention "cs_r" on DFI Interface
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2022-02-25
Luke Kenneth...
set name of DFI interface to ecp5phy in ECP5DDRPHY
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2022-02-25
Luke Kenneth...
allow DDR3 reset (rst) signal to be controlled by DFI...
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2022-02-24
Luke Kenneth...
add a BitSlip module
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2022-02-24
Luke Kenneth...
replace the simulation Clock-Reset-Generator with one...
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2022-02-24
Luke Kenneth...
add CSRs to FakePHY which allows at least testing of...
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2022-02-22
Luke Kenneth...
remove continue/skip and add comment that all
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2022-02-21
Luke Kenneth...
add debug print statements to investigate FakePHY
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2022-02-21
Luke Kenneth...
add a debug verilog dump of one of the FakePHY SocTest...
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2022-02-20
Luke Kenneth...
add dfii submodules so they get explicit names
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2022-02-20
Luke Kenneth...
add name to DFI Interface (helps gtkwave traces)
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2022-02-19
Luke Kenneth...
fix gram unit test imports
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2022-02-16
Luke Kenneth...
fix ECP5DDRPHY cs declaration
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2020-08-07
Jean THOMAS
gram.test.test_core_bankmachine: Reduce formal test...
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2020-08-07
Jean THOMAS
Add links to other memory controller projects
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2020-08-07
Jean THOMAS
gram.core.multiplexer: Fix variable name in _Steerer
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2020-08-07
Jean THOMAS
gram.test.test_core_multiplexer: Add test for _Steerer...
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2020-08-07
Jean THOMAS
gram.core.multiplexer: Remove unnecessary array slicing
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2020-08-07
Jean THOMAS
gram.core.multiplexer: Code cleaning in _Steerer
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2020-08-07
Jean THOMAS
gram.core.multiplexer: Cleaner code in _Steerer
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2020-08-07
Jean THOMAS
examples: Display rdly map
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2020-08-07
Jean THOMAS
gram.test.test_core_bankmachine: Ensure refresh_gnt...
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2020-08-07
Jean THOMAS
gram.core.bankmachine: Make condition code cleaner
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2020-08-07
Jean THOMAS
gram.core.bankmachine: Add comment for address slicers
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2020-08-07
Jean THOMAS
gram.core.bankmachine: Remove unused local variables...
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2020-08-07
Jean THOMAS
gram.core.bankmachine: Rename LiteDRAM -> gram in docum...
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2020-08-07
Jean THOMAS
gram.test.test_core_bankmachine: Add test for _AddressS...
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2020-08-07
Jean THOMAS
gram.test.test_core_refresher: Add test for ZQCSExecute...
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2020-08-07
Jean THOMAS
gram.phy.ecp5ddrphy: Fix ECP5DDRPHYInit (wrong domains)
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2020-08-07
Jean THOMAS
gram.phy.ecp5ddrphy: Remove internal signal for delay
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2020-08-07
Jean THOMAS
gram.phy.ecp5ddrphy: Detect burstdet on rising edge...
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2020-08-06
Jean THOMAS
examples: Load stock calibration profile if calibration...
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2020-08-06
Jean THOMAS
gram.phy.ecp5ddrphy: Make non-critical signals reset...
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2020-08-06
Jean THOMAS
gram.phy.ecp5ddrphy: Revert to LiteDRAM's dqs_re
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2020-08-06
Jean THOMAS
gram.core.multiplexer: Fix regression introduced in...
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2020-08-06
Jean THOMAS
examples: Make frequency a parameter
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2020-08-06
Jean THOMAS
examples: Continue self-test even if calibration is...
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2020-08-06
Jean THOMAS
gram.phy.ecp5ddrphy: Remove unused stream import
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2020-08-06
Jean THOMAS
gram.phy.ecp5ddrphy: Add documentation for _DQSBUFMSett...
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2020-08-06
Jean THOMAS
gram.test: Use correct timing for simulations
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2020-08-06
Jean THOMAS
gram.phy.ecp5ddrphy: Fix DQSBUFM's pause signal (fixes...
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2020-08-06
Jean THOMAS
gram.phy.ecp5ddrphy: Code cleaning
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2020-08-05
Jean THOMAS
gram.core.bankmachine: Factorize tXXDController valid...
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2020-08-05
Jean THOMAS
Fix code styling
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2020-08-05
Jean THOMAS
Remove steerer_sel function
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2020-08-05
Jean THOMAS
Fix test using delays for comb propagation instead...
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2020-08-05
Jean THOMAS
Add unit test for tXXDController
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2020-08-04
Jean THOMAS
Fix AntiStarvation test
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2020-08-04
Jean THOMAS
Fix exception condition
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2020-08-04
Jean THOMAS
Raise ValueError if the number of DQ pads is not a...
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2020-08-04
Jean THOMAS
Raise ValueError if RefreshTimer period is unsupported...
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2020-08-04
Jean THOMAS
Raise ValueError if anti-starvation timeout is unsuppor...
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2020-08-04
Jean THOMAS
Raise ValueError if commands array isn't of len=4 ...
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2020-08-04
Jean THOMAS
Sample data based on datavalid signal (fixes #47)
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2020-08-04
Jean THOMAS
Raise exception if no native port is present (fixing...
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2020-08-04
Jean THOMAS
Make burstdet_reg reset-less
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2020-08-04
Jean THOMAS
Fix simulation to support diff pairs
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2020-08-04
Jean THOMAS
Fix sel signal used in wishbone frontend
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2020-08-04
Jean THOMAS
Default SEL to 1's if SEL=0 (fixes #43)
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2020-08-04
Jean THOMAS
Remove unused variable in wishbone frontend test
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2020-08-03
Jean THOMAS
Add additional tests for sel signal
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2020-08-03
Jean THOMAS
Add more sel tests
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2020-08-03
Jean THOMAS
Fix native port we signal (fixes #44)
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2020-08-03
Jean THOMAS
Fix sel test
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2020-08-03
Jean THOMAS
Add test for wishbone sel signal
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