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yosys.git
2020-08-05
Sahand Kashani
Add support for real-valued parameters + preserve type...
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2020-07-23
Sahand Kashani
Add firrtl backend support for generic parameters in...
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2020-07-21
clairexen
Merge pull request #2215 from boqwxp/qbfsat-solver...
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2020-07-20
Alberto Gonzalez
smtio: Emit `mode: start` options before `set-logic...
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2020-07-20
Alberto Gonzalez
smtio: Add support for parsing `yosys-smt2-solver-optio...
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2020-07-20
Alberto Gonzalez
qbfsat: Add `-solver-option` option.
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2020-07-20
Alberto Gonzalez
smt2: Add `-solver-option` option.
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2020-07-20
clairexen
Merge pull request #2282 from YosysHQ/claire/satunsat
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2020-07-20
Marcelina Kościelnicka
celltypes: Fix EN port name for some FF types.
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2020-07-20
Claire Wolf
Only allow "sat" and "unsat" smt solver responses in...
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2020-07-20
clairexen
Merge pull request #2276 from YosysHQ/mwk/satgen-cc
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2020-07-18
Marcelina Kościelnicka
satgen: Move importCell out of the header.
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2020-07-17
Miodrag Milanović
Merge pull request #2275 from YosysHQ/mwk/sf2-clkint-fix
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2020-07-17
Marcelina Kościelnicka
sf2: Emit CLKINT even if -clkbuf not passed
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2020-07-17
Miodrag Milanović
Merge pull request #2274 from YosysHQ/mwk/anlogic-ff-fix
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2020-07-17
Marcelina Kościelnicka
anlogic: Fix FF mapping.
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2020-07-16
clairexen
Merge pull request #2229 from Ravenslofty/sf2_remove_sf...
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2020-07-16
clairexen
Merge pull request #2273 from whitequark/write-verilog...
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2020-07-16
clairexen
Merge pull request #2272 from whitequark/write-verilog-sv
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2020-07-16
Miodrag Milanović
Merge pull request #2238 from YosysHQ/mwk/dfflegalize...
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2020-07-16
Miodrag Milanović
Merge pull request #2226 from YosysHQ/mwk/nuke-efinix...
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2020-07-16
whitequark
verilog_backend: in non-SV mode, add a trigger for...
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2020-07-16
whitequark
verilog_backend: add `-sv` option, make `-o <filename...
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2020-07-16
whitequark
Merge pull request #2270 from whitequark/cxxrtl-fix...
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2020-07-15
whitequark
Merge pull request #2269 from YosysHQ/claire/bisonwall
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2020-07-15
Claire Wolf
Treat all bison warnings as errors in verilog front-end
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2020-07-15
Claire Wolf
Use %precedence in verilog_parser.y
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2020-07-15
Claire Wolf
Fix bison warnings for missing %empty
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2020-07-15
Claire Wolf
Run bison with -Wall for verilog front-end
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2020-07-15
clairexen
Merge pull request #2257 from antmicro/fix-conflicts
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2020-07-15
Kamil Rakoczy
Add missing semicolons
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2020-07-15
Marcelina Kościelnicka
opt_merge: Dedup one more use of FF cell type list.
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2020-07-14
Marcelina Kościelnicka
achronix: Use dfflegalize.
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2020-07-14
whitequark
cxxrtl: fix typo. NFC.
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2020-07-14
Marcelina Kościelnicka
anlogic: Use dfflegalize.
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2020-07-13
Marcelina Kościelnicka
intel: Use dfflegalize.
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2020-07-13
Lofty
Revert "intel_alm: direct M10K instantiation"
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2020-07-13
whitequark
Merge pull request #2263 from whitequark/cxxrtl-capi...
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2020-07-12
whitequark
cxxrtl: expose eval() and commit() via the C API.
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2020-07-12
Marcelina Kościelnicka
xilinx: Fix srl regression.
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2020-07-12
Marcelina Kościelnicka
proc_dlatch: Remove init values for combinatorial proce...
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2020-07-12
Marcelina Kościelnicka
dfflegalize: Gather init values from all wires.
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2020-07-10
clairexen
Merge pull request #2256 from YosysHQ/claire/fix2241
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2020-07-10
Claire Wolf
Add AST_EDGE support to AstNode::detect_latch(), fixes...
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2020-07-10
Kamil Rakoczy
Fix S/R conflicts
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2020-07-10
Kamil Rakoczy
Fix R/R conflicts
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2020-07-10
Kamil Rakoczy
Revert "Revert PRs #2203 and #2244."
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2020-07-09
Dan Ravensloft
sf2: replace sf2_iobs with {clkbuf,iopad}map
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2020-07-09
whitequark
Merge pull request #2255 from whitequark/bison-Werror...
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2020-07-09
whitequark
Merge pull request #2254 from whitequark/cxxrtl-extern-c
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2020-07-09
Marcelina Kościelnicka
sf2: Use dfflegalize.
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2020-07-09
whitequark
verilog_parser: turn S/R and R/R conflicts into hard...
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2020-07-09
whitequark
Revert PRs #2203 and #2244.
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2020-07-09
whitequark
cxxrtl: add missing extern "C".
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2020-07-09
Marcelina Kościelnicka
xilinx: Use dfflegalize.
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2020-07-09
Marcelina Kościelnicka
dfflibmap: Refactor to use dfflegalize internally.
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2020-07-09
Lucas Castro
Fix issue #2251 (#2252)
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2020-07-09
Marcelina Kościelnicka
clkbufmap: improve input pad handling.
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2020-07-09
clairexen
Merge pull request #2244 from antmicro/logic
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2020-07-09
Marcelina Kościelnicka
clk2fflogic: Consistently treat async control signals...
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2020-07-09
Marcelina Kościelnicka
dfflegalize: Add special support for const-D latches.
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2020-07-07
whitequark
Merge pull request #2246 from YosysHQ/mwk/dfflegalize...
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2020-07-07
Marcelina Kościelnicka
dfflegalize: typo fix
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2020-07-06
Marcelina Kościelnicka
efinix: Use dfflegalize.
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2020-07-06
Marcelina Kościelnicka
gowin: Use dfflegalize.
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2020-07-06
Kamil Rakoczy
Add logic param and integer bad syntax tests
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2020-07-06
Lukasz Dalek
Support logic typed parameters
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2020-07-05
Dan Ravensloft
intel_alm: direct M10K instantiation
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2020-07-05
Marcelina Kościelnicka
Naming fixes.
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2020-07-05
Dan Ravensloft
synth_gowin: ABC9 support
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2020-07-05
Dan Ravensloft
intel_alm: add Cyclone 10 GX tests
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2020-07-05
Marcelina Kościelnicka
Merge pull request #2236 from YosysHQ/mwk/dfflegalize...
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2020-07-05
Marcelina Kościelnicka
ecp5: Use dfflegalize.
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2020-07-05
whitequark
Merge pull request #2227 from Ravenslofty/ccache
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2020-07-05
Marcelina Kościelnicka
Merge pull request #2232 from YosysHQ/mwk/gowin-sim...
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2020-07-05
Marcelina Kościelnicka
dfflegalize: Prefer mapping dff to sdff before adff
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2020-07-05
Marcelina Kościelnicka
opt_expr: Fix crash on $mul optimization with more...
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2020-07-05
Dan Ravensloft
intel_alm: DSP inference
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2020-07-05
Marcelina Kościelnicka
ice40: Use dfflegalize.
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2020-07-05
Marcelina Kościelnicka
gowin: Fix INIT values in sim library.
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2020-07-04
Dan Ravensloft
gowin: replace determine_init with setundef
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2020-07-04
Marcelina Kościelnicka
synth_intel_alm: Use dfflegalize.
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2020-07-04
Dan Ravensloft
Add option to use ccache when building
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2020-07-04
Marcelina Kościelnicka
efinix: Nuke efinix_gbuf in favor of clkbufmap.
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2020-07-04
Dan Ravensloft
Improve MISTRAL_FF specify rules
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2020-07-04
Eddie Hung
tests: update fsm.ys resource count
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2020-07-04
Eddie Hung
abc9: only techmap (* abc9_flop *) modules
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2020-07-04
Eddie Hung
intel_alm: compose $__MISTRAL_FF_SYNCONLY from MISTRAL_FF
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2020-07-04
Eddie Hung
abc9: techmap from user design to allow abc9_flop modul...
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2020-07-04
Eddie Hung
intel_alm: add $__ prefix to MISTRAL_FF_SYNCONLY
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2020-07-04
Dan Ravensloft
intel_alm: ABC9 sequential optimisations
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2020-07-03
Rupert Swarbrick
Add newlines to help text for dfflegalize
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2020-07-02
clairexen
Merge pull request #2132 from YosysHQ/eddie/verific_initial
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2020-07-02
clairexen
Merge pull request #2208 from boqwxp/qbfsat-cleanup
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2020-07-02
clairexen
Merge pull request #2186 from YosysHQ/mwk/dfflegalize
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2020-07-02
clairexen
Merge pull request #2211 from YosysHQ/mwk/fix-fmcombine-ff
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2020-07-02
clairexen
Merge pull request #2210 from YosysHQ/mwk/fix-opt_merge
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2020-07-02
clairexen
Merge pull request #2195 from YosysHQ/mwk/manual-gates
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2020-07-01
Alberto Gonzalez
qbfsat: Remove useless comment and #ifndef guards.
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2020-07-01
Alberto Gonzalez
qbfsat: Specify default values for some options in...
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