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yosys.git
2020-07-15
Claire Wolf
Treat all bison warnings as errors in verilog front-end
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2020-07-15
Claire Wolf
Use %precedence in verilog_parser.y
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2020-07-15
Claire Wolf
Fix bison warnings for missing %empty
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2020-07-15
Claire Wolf
Run bison with -Wall for verilog front-end
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2020-07-15
clairexen
Merge pull request #2257 from antmicro/fix-conflicts
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2020-07-15
Kamil Rakoczy
Add missing semicolons
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2020-07-15
Marcelina Kościelnicka
opt_merge: Dedup one more use of FF cell type list.
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2020-07-14
Marcelina Kościelnicka
achronix: Use dfflegalize.
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2020-07-13
Marcelina Kościelnicka
intel: Use dfflegalize.
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2020-07-13
Lofty
Revert "intel_alm: direct M10K instantiation"
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2020-07-13
whitequark
Merge pull request #2263 from whitequark/cxxrtl-capi...
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2020-07-12
whitequark
cxxrtl: expose eval() and commit() via the C API.
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2020-07-12
Marcelina Kościelnicka
xilinx: Fix srl regression.
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2020-07-12
Marcelina Kościelnicka
proc_dlatch: Remove init values for combinatorial proce...
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2020-07-12
Marcelina Kościelnicka
dfflegalize: Gather init values from all wires.
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2020-07-10
clairexen
Merge pull request #2256 from YosysHQ/claire/fix2241
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2020-07-10
Claire Wolf
Add AST_EDGE support to AstNode::detect_latch(), fixes...
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2020-07-10
Kamil Rakoczy
Fix S/R conflicts
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2020-07-10
Kamil Rakoczy
Fix R/R conflicts
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2020-07-10
Kamil Rakoczy
Revert "Revert PRs #2203 and #2244."
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2020-07-09
whitequark
Merge pull request #2255 from whitequark/bison-Werror...
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2020-07-09
whitequark
Merge pull request #2254 from whitequark/cxxrtl-extern-c
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2020-07-09
Marcelina Kościelnicka
sf2: Use dfflegalize.
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2020-07-09
whitequark
verilog_parser: turn S/R and R/R conflicts into hard...
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2020-07-09
whitequark
Revert PRs #2203 and #2244.
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2020-07-09
whitequark
cxxrtl: add missing extern "C".
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2020-07-09
Marcelina Kościelnicka
xilinx: Use dfflegalize.
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2020-07-09
Marcelina Kościelnicka
dfflibmap: Refactor to use dfflegalize internally.
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2020-07-09
Lucas Castro
Fix issue #2251 (#2252)
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2020-07-09
Marcelina Kościelnicka
clkbufmap: improve input pad handling.
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2020-07-09
clairexen
Merge pull request #2244 from antmicro/logic
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2020-07-09
Marcelina Kościelnicka
clk2fflogic: Consistently treat async control signals...
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2020-07-09
Marcelina Kościelnicka
dfflegalize: Add special support for const-D latches.
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2020-07-07
whitequark
Merge pull request #2246 from YosysHQ/mwk/dfflegalize...
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2020-07-07
Marcelina Kościelnicka
dfflegalize: typo fix
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2020-07-06
Marcelina Kościelnicka
efinix: Use dfflegalize.
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2020-07-06
Marcelina Kościelnicka
gowin: Use dfflegalize.
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2020-07-06
Kamil Rakoczy
Add logic param and integer bad syntax tests
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2020-07-06
Lukasz Dalek
Support logic typed parameters
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2020-07-05
Dan Ravensloft
intel_alm: direct M10K instantiation
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2020-07-05
Marcelina Kościelnicka
Naming fixes.
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2020-07-05
Dan Ravensloft
synth_gowin: ABC9 support
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2020-07-05
Dan Ravensloft
intel_alm: add Cyclone 10 GX tests
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2020-07-05
Marcelina Kościelnicka
Merge pull request #2236 from YosysHQ/mwk/dfflegalize...
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2020-07-05
Marcelina Kościelnicka
ecp5: Use dfflegalize.
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2020-07-05
whitequark
Merge pull request #2227 from Ravenslofty/ccache
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2020-07-05
Marcelina Kościelnicka
Merge pull request #2232 from YosysHQ/mwk/gowin-sim...
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2020-07-05
Marcelina Kościelnicka
dfflegalize: Prefer mapping dff to sdff before adff
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2020-07-05
Marcelina Kościelnicka
opt_expr: Fix crash on $mul optimization with more...
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2020-07-05
Dan Ravensloft
intel_alm: DSP inference
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2020-07-05
Marcelina Kościelnicka
ice40: Use dfflegalize.
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2020-07-05
Marcelina Kościelnicka
gowin: Fix INIT values in sim library.
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2020-07-04
Dan Ravensloft
gowin: replace determine_init with setundef
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2020-07-04
Marcelina Kościelnicka
synth_intel_alm: Use dfflegalize.
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2020-07-04
Dan Ravensloft
Add option to use ccache when building
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2020-07-04
Dan Ravensloft
Improve MISTRAL_FF specify rules
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2020-07-04
Eddie Hung
tests: update fsm.ys resource count
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2020-07-04
Eddie Hung
abc9: only techmap (* abc9_flop *) modules
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2020-07-04
Eddie Hung
intel_alm: compose $__MISTRAL_FF_SYNCONLY from MISTRAL_FF
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2020-07-04
Eddie Hung
abc9: techmap from user design to allow abc9_flop modul...
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2020-07-04
Eddie Hung
intel_alm: add $__ prefix to MISTRAL_FF_SYNCONLY
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2020-07-04
Dan Ravensloft
intel_alm: ABC9 sequential optimisations
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2020-07-03
Rupert Swarbrick
Add newlines to help text for dfflegalize
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2020-07-02
clairexen
Merge pull request #2132 from YosysHQ/eddie/verific_initial
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2020-07-02
clairexen
Merge pull request #2208 from boqwxp/qbfsat-cleanup
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2020-07-02
clairexen
Merge pull request #2186 from YosysHQ/mwk/dfflegalize
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2020-07-02
clairexen
Merge pull request #2211 from YosysHQ/mwk/fix-fmcombine-ff
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2020-07-02
clairexen
Merge pull request #2210 from YosysHQ/mwk/fix-opt_merge
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2020-07-02
clairexen
Merge pull request #2195 from YosysHQ/mwk/manual-gates
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2020-07-01
Alberto Gonzalez
qbfsat: Remove useless comment and #ifndef guards.
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2020-07-01
Alberto Gonzalez
qbfsat: Specify default values for some options in...
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2020-07-01
Alberto Gonzalez
qbfsat: Clean up external executable command lines...
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2020-07-01
Alberto Gonzalez
qbfsat: Clean up and refactor data structures into...
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2020-07-01
clairexen
Merge pull request #2203 from antmicro/fix-grammar
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2020-07-01
clairexen
Merge pull request #2179 from splhack/static-cast
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2020-07-01
clairexen
Merge pull request #2138 from boqwxp/qbfsat-oflag
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2020-07-01
clairexen
Merge pull request #2206 from boqwxp/qbfsat-fix-name...
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2020-06-30
Marcelina Kościelnicka
dfflegalize: Add tests.
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2020-06-30
Marcelina Kościelnicka
Add dfflegalize pass.
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2020-06-30
Marcelina Kościelnicka
fmcombine: use the master ff cell type list
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2020-06-30
Marcelina Kościelnicka
opt_merge: use the master FF type list
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2020-06-30
clairexen
Merge pull request #2136 from zachjs/master
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2020-06-30
clairexen
Merge pull request #2199 from YosysHQ/mmicko/sim_memory
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2020-06-30
clairexen
Merge pull request #2201 from YosysHQ/fix_test_cell_ilang
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2020-06-30
clairexen
Merge pull request #2209 from YosysHQ/verific_update
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2020-06-30
Marcelina Kościelnicka
simcells: Fix reset polarity for $_DLATCH_???_ cells.
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2020-06-30
Miodrag Milanovic
Update verific API version check
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2020-06-30
Alberto Gonzalez
qbfsat: Add `-O[012]` options to control pre-solving...
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2020-06-30
Alberto Gonzalez
qbfsat: Fix name-based hole specialization.
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2020-06-30
whitequark
Merge pull request #2205 from whitequark/fix-2204
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2020-06-29
whitequark
techmap: don't drop attributes on replaced cells.
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2020-06-29
Zachary Snow
Allow constant function calls in for loops and generate...
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2020-06-29
Miodrag Milanović
Merge pull request #2200 from YosysHQ/mmicko/fix_expose
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2020-06-29
Miodrag Milanovic
Give error that options are exclusive
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2020-06-29
Miodrag Milanovic
cleanup
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2020-06-29
whitequark
Merge pull request #2197 from Xiretza/test_cell-shifts
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2020-06-29
Miodrag Milanovic
Use ID macro to fix assertion
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2020-06-29
Miodrag Milanovic
expose pass fix
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2020-06-29
Miodrag Milanovic
sim - error when memrd and memwr detected
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2020-06-28
Xiretza
test_cell: don't generate directional shifts with ...
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