yosys.git
2019-05-01 Clifford WolfAdd missing enable_undef to "sat -tempinduct-def",...
2019-05-01 Clifford WolfMerge pull request #977 from ucb-bar/fixfirrtlmem
2019-05-01 Jim LawsonFix #938 - Crash occurs in case when use write_firrtl...
2019-05-01 Clifford WolfFix floating point exception in qwp, fixes #923
2019-04-30 Clifford WolfFix segfault in wreduce
2019-04-30 Clifford WolfDisabled "final loop assignment" feature
2019-04-30 Clifford WolfMerge pull request #972 from YosysHQ/clifford/fix968
2019-04-30 Clifford WolfMerge pull request #966 from YosysHQ/clifford/fix956
2019-04-30 Clifford WolfMerge pull request #962 from YosysHQ/eddie/refactor_syn...
2019-04-30 Clifford WolfMerge branch 'master' into eddie/refactor_synth_xilinx
2019-04-30 Clifford WolfMerge pull request #973 from christian-krieg/feature...
2019-04-30 Clifford WolfInclude filename in "Executing Verilog-2005 frontend...
2019-04-30 Clifford WolfFix performance bug in RTLIL::SigSpec::operator==(...
2019-04-30 Clifford WolfAdd final loop variable assignment when unrolling for...
2019-04-30 Clifford WolfAdd handling of init attributes in "opt_expr -undriven"
2019-04-30 Benedikt TutzerMerge branch 'master' of https://github.com/YosysHQ...
2019-04-30 Benedikt TutzerCleaned up root directory
2019-04-29 Clifford WolfMerge pull request #960 from YosysHQ/eddie/equiv_opt_undef
2019-04-29 Clifford WolfMerge pull request #967 from olegendo/depfile_esc_spaces
2019-04-29 Oleg Endofix codestyle formatting
2019-04-29 Oleg Endoescape spaces with backslash when writing dep file
2019-04-29 Clifford WolfDrive dangling wires with init attr with their init...
2019-04-26 Eddie HungWhere did this check come from!?!
2019-04-26 Eddie HungRefactor synth_xilinx to auto-generate doc
2019-04-26 Eddie HungCleanup ice40
2019-04-26 Eddie HungAdd -undef option to equiv_opt, passed to equiv_induct
2019-04-25 Eddie HungMisspelling
2019-04-23 Clifford WolfMerge pull request #957 from YosysHQ/oai4fix
2019-04-23 David ShahFixes for OAI4 cell implementation
2019-04-23 Eddie HungFormat some names using inline code
2019-04-23 Eddie HungFix spelling
2019-04-23 Clifford WolfRemove some left-over log_dump()
2019-04-22 Eddie HungMerge pull request #914 from YosysHQ/xc7srl
2019-04-22 Eddie HungUpdate help message
2019-04-22 Clifford WolfMerge pull request #952 from YosysHQ/clifford/fix370
2019-04-22 Clifford WolfMerge pull request #951 from YosysHQ/clifford/logdebug
2019-04-22 Clifford WolfMerge pull request #949 from YosysHQ/clifford/pmux2shim...
2019-04-22 Clifford WolfMerge pull request #953 from YosysHQ/clifford/fix948
2019-04-22 Eddie HungMove 'shregmap -tech xilinx' into map_cells
2019-04-22 Clifford WolfAdd support for zero-width signals to Verilog back...
2019-04-22 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-04-22 Clifford WolfDetermine correct signedness and expression width in...
2019-04-22 Clifford WolfAdd log_debug() framework
2019-04-22 Clifford WolfMerge pull request #950 from whitequark/attrmap_remove_...
2019-04-22 whitequarkattrmap: extend -remove to allow removing attributes...
2019-04-22 Clifford WolfUpdaye pmux2shiftx test
2019-04-22 Clifford WolfAdd full_pmux feature to pmux2shiftx
2019-04-22 Clifford WolfSet ENABLE_LIBYOSYS=0 by default
2019-04-22 Clifford WolfSet ENABLE_PYOSYS=0 by default
2019-04-22 Clifford WolfMerge pull request #905 from christian-krieg/feature...
2019-04-22 Clifford WolfMerge pull request #941 from Wren6991/sim_lib_io_clke
2019-04-22 Clifford WolfMerge branch 'dh73-master'
2019-04-22 Clifford WolfMerge branch 'master' of https://github.com/dh73/yosys_...
2019-04-22 Clifford WolfRe-added clean after techmap in synth_xilinx
2019-04-22 Clifford WolfMerge pull request #916 from YosysHQ/map_cells_before_m...
2019-04-22 Clifford WolfMerge pull request #911 from mmicko/gowin-nobram
2019-04-22 Clifford WolfMerge pull request #909 from zachjs/master
2019-04-22 Clifford WolfMerge pull request #944 from YosysHQ/clifford/pmux2shiftx
2019-04-22 Clifford WolfMerge pull request #945 from YosysHQ/clifford/libwb
2019-04-22 Clifford WolfDisable blackbox detection in techmap files
2019-04-21 Eddie HungTidy up, fix for -nosrl
2019-04-21 Eddie HungMerge branch 'map_cells_before_map_luts' into xc7srl
2019-04-21 Eddie HungMerge branch 'master' into map_cells_before_map_luts
2019-04-21 Eddie HungAdd comments
2019-04-21 Eddie HungUse new pmux2shiftx from #944, remove my old attempt
2019-04-21 Luke Wrenice40 cells_sim.v: SB_IO: update clock enable behaviour...
2019-04-21 Clifford WolfFix tests
2019-04-21 Clifford WolfAdd "noblackbox" attribute
2019-04-21 Eddie HungMerge remote-tracking branch 'origin/clifford/pmux2shif...
2019-04-21 Eddie HungMerge remote-tracking branch 'origin/master' into xc7srl
2019-04-20 Clifford WolfNew behavior for front-end handling of whiteboxes
2019-04-20 Clifford WolfMerge pull request #943 from YosysHQ/clifford/whitebox
2019-04-20 Eddie HungMerge remote-tracking branch 'origin/pmux2shiftx' into...
2019-04-20 Eddie HungMerge remote-tracking branch 'origin' into xc7srl
2019-04-20 Clifford WolfAuto-initialize OnehotDatabase on-demand in pmux2shiftx.cc
2019-04-20 Clifford WolfAdd "onehot" pass, improve "pmux2shiftx" onehot handling
2019-04-20 Clifford WolfAdd "techmap -wb", use in formal flows
2019-04-20 Clifford WolfCheck blackbox attribute in techmap/simplemap
2019-04-20 Clifford WolfAdd "wbflip" command
2019-04-20 Clifford WolfMerge pull request #942 from YosysHQ/clifford/fix931
2019-04-20 Clifford WolfImprove "pmux2shiftx"
2019-04-19 Clifford WolfFix some typos
2019-04-19 Clifford WolfImprovements in "pmux2shiftx"
2019-04-19 Clifford WolfImprovements in pmux2shiftx
2019-04-19 Clifford WolfAdd test for pmux2shiftx
2019-04-19 Clifford WolfImprove pmux2shift ctrl permutation finder
2019-04-19 Clifford WolfComplete rewrite of pmux2shiftx
2019-04-19 Clifford WolfImport initial pmux2shiftx from eddieh
2019-04-19 Clifford WolfImprove "show" handling of 0/1/X/Z padding
2019-04-19 Clifford WolfChange "ne" to "neq" in btor2 output
2019-04-19 Clifford WolfAdd tests/aiger/.gitignore
2019-04-19 Eddie HungSpelling fixes
2019-04-19 Eddie HungRevert "write_json to not write contents (cells/wires...
2019-04-18 Clifford WolfUpdate to ABC 3709744
2019-04-18 Eddie HungMerge pull request #917 from YosysHQ/eddie/fix_retime
2019-04-18 Eddie Hungwrite_json to not write contents (cells/wires) of white...
2019-04-18 Eddie HungIgnore 'whitebox' attr in flatten with "-wb" option
2019-04-18 Eddie HungFix abc's remap_name to not ignore [^0-9] when extracti...
2019-04-18 Eddie HungABC to call retime all the time
2019-04-18 Clifford WolfAdd "whitebox" attribute, add "read_verilog -wb"
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