yosys.git
2019-10-10 Marcin Kościelnickixilinx: Add simulation model for IBUFG.
2019-10-08 Eddie HungRevert "Add test that is expecting to fail"
2019-10-08 Eddie HungRevert "Be mindful that sigmap(wire) could have dupes...
2019-10-08 Eddie HungMerge pull request #1432 from YosysHQ/eddie/fix1427
2019-10-08 Eddie HungMerge pull request #1433 from YosysHQ/eddie/equiv_opt_a...
2019-10-08 Eddie HungMerge pull request #1437 from YosysHQ/eddie/abc_to_abc9
2019-10-08 Eddie HungMerge pull request #1438 from YosysHQ/eddie/xilinx_dsp_...
2019-10-06 Clifford WolfMerge pull request #1439 from YosysHQ/eddie/fix_ice40_w...
2019-10-05 Eddie HungMissing 'accept' at end of ice40_wrapcarry, spotted...
2019-10-05 Clifford WolfUpdate README.md
2019-10-05 Eddie HungMissed this
2019-10-05 Eddie HungAdd comment on why we have to match for clock-enable...
2019-10-05 Eddie HungAdd note on pattern detector
2019-10-05 Miodrag MilanovićMerge pull request #1436 from YosysHQ/mmicko/msvc_fix
2019-10-05 Eddie HungAdd comment on why partial multipliers are 18x18
2019-10-05 Eddie HungAdd comments for xilinx_dsp_cascade
2019-10-05 Eddie HungImprove comments for xilinx_dsp_CREG
2019-10-05 Eddie HungFix comment
2019-10-05 Eddie HungRestore optimisation for sigM.empty()
2019-10-05 Eddie HungRetry on fixing TODOs
2019-10-05 Eddie HungRevert "Fix TODOs"
2019-10-05 Eddie HungMore comments, cleanup
2019-10-05 Eddie HungFix TODOs
2019-10-05 Eddie HungConsistency
2019-10-05 Eddie HungAdd comments for xilinx_dsp
2019-10-05 Eddie HungFix typo in check_label()
2019-10-05 Eddie HungMerge branch 'master' into eddie/abc_to_abc9
2019-10-05 Eddie HungAdd temporary `abc9 -nomfs` and use for `synth_xilinx...
2019-10-05 Eddie HungRemove DSP48E1 from *_cells_xtra.v
2019-10-04 Eddie HungFix xilinx_dsp for unsigned extensions
2019-10-04 Eddie HungFix for SigSpec() == SigSpec(State::Sx, 0) to be true...
2019-10-04 Eddie HungAdd Const::{begin,end,empty}()
2019-10-04 Eddie HungRename abc_* names/attributes to more precisely be...
2019-10-04 Eddie HungPanic over. Model was elsewhere. Re-arrange for consistency
2019-10-04 Eddie HungOops
2019-10-04 Eddie HungOhmilord this wasn't added all this time!?!
2019-10-04 Eddie HungAdd -async2sync to help text as per @daveshah1
2019-10-04 Miodrag MilanovicFixes for MSVC build
2019-10-03 Eddie HungUse `sat -tempinduct` and comments for why equiv_opt...
2019-10-03 Eddie HungRestore part of doc
2019-10-03 Eddie HungDisable equiv check for ice40 latches
2019-10-03 Eddie HungAdd new -async2sync option
2019-10-03 Eddie HungUse equiv_opt -async2sync for xilinx
2019-10-03 Eddie HungRevert "equiv_opt to call async2sync when not -multiclo...
2019-10-03 Eddie HungRevert "Update doc for equiv_opt"
2019-10-03 Clifford WolfChange smtbmc "Warmup failed" status to "PREUNSAT"
2019-10-03 Clifford WolfUpdate ABC to git rev 623b5e8
2019-10-03 Clifford WolfBump version
2019-10-03 Clifford WolfMerge pull request #1419 from YosysHQ/eddie/lazy_derive
2019-10-03 Clifford WolfMerge pull request #1422 from YosysHQ/eddie/aigmap_select
2019-10-03 Clifford WolfMerge pull request #1429 from YosysHQ/clifford/checkmapped
2019-10-03 Clifford WolfAdd "check -allow-tbuf"
2019-10-03 David ShahMerge pull request #1425 from YosysHQ/dave/ecp5_pdp16
2019-10-03 Eddie HungFix broken CI, check reset even for constants, trim...
2019-10-03 Eddie HungMerge pull request #1423 from YosysHQ/eddie/techmap_rep...
2019-10-03 Eddie HungFix test
2019-10-03 Eddie HungMerge branch 'eddie/fix_sat_init' into eddie/fix1427
2019-10-03 Eddie HungUpdate test
2019-10-03 Eddie HungRefactor peepopt_dffmux and be sensitive to \init when...
2019-10-03 Eddie HungAdd test
2019-10-03 Eddie Hunglog_dump() to support State enum
2019-10-02 Eddie HungBe mindful that sigmap(wire) could have dupes when...
2019-10-02 Eddie HungAdd test that is expecting to fail
2019-10-02 Eddie HungAlso rename cells with _TECHMAP_REPLACE_. prefix, as...
2019-10-02 Eddie HungExtend test with renaming cells with prefix too
2019-10-02 Clifford WolfMerge pull request #1428 from YosysHQ/clifford/fixbtor
2019-10-02 Clifford WolfAdd "check -mapped"
2019-10-02 Clifford WolfFix btor back-end to use "state" instead of "input...
2019-10-01 Miodrag MilanovićMerge pull request #1426 from YosysHQ/mmicko/fix_environ
2019-10-01 Miodrag MilanovicDefine environ, fixes #1424
2019-10-01 David Shahecp5: Fix shuffle_enable port
2019-10-01 David Shahecp5: Add support for mapping 36-bit wide PDP BRAMs
2019-10-01 Eddie HungAdd test
2019-10-01 Eddie Hungtechmap wires named _TECHMAP_REPLACE_.<identifier>...
2019-09-30 Eddie HungAdd quick test
2019-09-30 Eddie HungAdd -select option to aigmap
2019-09-30 Eddie HungFix typo
2019-09-30 Eddie HungFix for svinterfaces
2019-09-30 Eddie Hungmodule->derive() to be lazy and not touch ast if alread...
2019-09-30 Eddie HungUpdate doc for equiv_opt
2019-09-30 whitequarkMerge pull request #1406 from whitequark/connect_rpc
2019-09-30 Eddie HungMerge pull request #1397 from btut/fix/python_wrappers_...
2019-09-30 whitequarkrpc: new frontend.
2019-09-30 whitequarklibs: import json11.
2019-09-30 Miodrag MilanovićMerge pull request #1416 from YosysHQ/mmicko/frontend_b...
2019-09-30 Clifford WolfBump version
2019-09-30 Clifford WolfMerge pull request #1412 from YosysHQ/eddie/equiv_opt_a...
2019-09-30 Clifford WolfMerge pull request #1417 from YosysHQ/clifford/fixasync...
2019-09-30 Clifford WolfFix $dlatch handling in async2sync
2019-09-30 Eddie HungAdd latch test modified from #1363
2019-09-30 Eddie HungAdd LDCE/LDPE sim library, remove from *cells_xtra...
2019-09-30 Marcin Kościelnickisynth_xilinx: Support latches, remove used-up FF init...
2019-09-30 Eddie HungMerge pull request #1414 from hzeller/improve-replace...
2019-09-29 Eddie HungMerge pull request #1359 from YosysHQ/xc7dsp
2019-09-29 Miodrag MilanovicFix reading aig files on windows
2019-09-29 Miodrag MilanovicOpen aig frontend as binary file
2019-09-29 Miodrag MilanovićMerge pull request #1413 from YosysHQ/mmicko/backend_bi...
2019-09-29 Clifford WolfMerge pull request #1411 from aman-goel/YosysHQ-master
2019-09-29 Henner ZellerAvoid work in replace() if rules empty.
2019-09-28 Miodrag MilanovicAdd aiger and protobuf backends binary support
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