yosys.git
2021-10-22 github-actions... Bump version
2021-10-21 Marcelina KościelnickaChange implicit conversions from bool to Sig* to explicit.
2021-10-21 Claire XenMerge pull request #3057 from YosysHQ/claire/verific_la...
2021-10-21 Claire Xenia... Fix verific.cc PRIM_DLATCH handling
2021-10-21 Claire Xenia... Initial Verific impoter support for {PRIM,WIDE_OPER...
2021-10-21 Marcelina Kościelnickaextract_reduce: Refactor and fix input signal construction.
2021-10-21 github-actions... Bump version
2021-10-20 Miodrag MilanovicIf verific have vhdl lib it is required by other libs
2021-10-20 Miodrag MilanovicForgot to remove from main list
2021-10-20 Miodrag MilanovicOption to disable verific VHDL support
2021-10-20 github-actions... Bump version
2021-10-19 Claire Xenia... Fixed Verific parser error in ice40 cell library
2021-10-19 Miodrag MilanovićMerge pull request #3045 from galibert/master
2021-10-19 Claire Xenia... Fixes in vcdcd.pl for newer Perl versions
2021-10-18 github-actions... Bump version
2021-10-17 Paul Annesleydfflegalize: remove redundant check for initialized...
2021-10-17 Olivier GalibertCycloneV: Add (passthrough) support for cyclonev_oscillator
2021-10-17 Olivier GalibertCycloneV: Add (passthrough) support for cyclonev_hps_in...
2021-10-16 github-actions... Bump version
2021-10-15 Claire XenMerge pull request #3044 from YosysHQ/micko/verific_bufif1
2021-10-14 Miodrag MilanovicSupport PRIM_BUFIF1 primitive
2021-10-12 github-actions... Bump version
2021-10-11 Claire XenMerge pull request #3039 from YosysHQ/claire/verific_aldff
2021-10-11 Claire Xenia... Add Verific adffe/dffsre/aldffe FIXMEs
2021-10-11 Claire XenMerge pull request #3040 from YosysHQ/micko/split_modul...
2021-10-11 Claire XenMerge pull request #3041 from YosysHQ/mmicko/module_attr
2021-10-10 Miodrag MilanovicImport module attributes from Verific
2021-10-09 Miodrag MilanovicSplit module ports, 20 per line
2021-10-09 github-actions... Bump version
2021-10-08 Claire Xenia... Fixes and add comments for open FIXME items
2021-10-08 Claire Xenia... Add support for $aldff flip-flops to verific importer
2021-10-08 Marcelina KościelnickaFix a regression from #3035.
2021-10-08 github-actions... Bump version
2021-10-07 Marcelina KościelnickaFfData: some refactoring.
2021-10-05 github-actions... Bump version
2021-10-04 Miodrag Milanovicverific set db_infer_set_reset_registers
2021-10-03 github-actions... Bump version
2021-10-02 Marcelina KościelnickaHook up $aldff support in various passes.
2021-10-02 Marcelina Kościelnickazinit: Refactor to use FfData.
2021-10-02 Marcelina Kościelnickakernel/ff: Refactor FfData to enable FFs with async...
2021-10-02 Marcelina KościelnickaAdd $aldff and $aldffe: flip-flops with async load.
2021-10-02 Zachary SnowSpecify minimum bison version 3.0+
2021-10-02 Marcelina Kościelnickasimplemap: refactor to use FfData.
2021-09-28 Miodrag MilanovićMerge pull request #3017 from YosysHQ/claire/short_rtli...
2021-09-28 github-actions... Bump version
2021-09-27 Miodrag MilanovicPrepare for next release cycle
2021-09-27 Claire Xenia... Add optimization to rtlil back-end for all-x parameter...
2021-09-25 github-actions... Bump version
2021-09-24 Claire XenMerge pull request #3014 from YosysHQ/claire/fix-vgtest
2021-09-23 Zachary SnowFix TOK_ID memory leak in for_initialization
2021-09-23 Claire Xenia... Fix "make vgtest" so it runs to the end (but now it...
2021-09-22 github-actions... Bump version
2021-09-21 Zachary Snowsv: support wand and wor of data types
2021-09-21 Zachary Snowverilog: fix multiple AST_PREFIX scope resolution issues
2021-09-19 github-actions... Bump version
2021-09-18 Miodrag MilanovićMerge pull request #3010 from the6p4c/master
2021-09-17 the6p4cFix protobuf backend build dependencies
2021-09-14 github-actions... Bump version
2021-09-13 Marcelina Kościelnickaverilog: Squash flex-triggered warning.
2021-09-13 Miodrag MilanovićUpdates for CHANGELOG (#2997)
2021-09-11 github-actions... Bump version
2021-09-10 Miodrag MilanovićMerge pull request #3001 from YosysHQ/claire/sigcheck
2021-09-10 Claire Xenia... Add additional check to SigSpec
2021-09-10 Marcelina Kościelnickayosys-smtbmc: Fix reused loop variable.
2021-09-10 github-actions... Bump version
2021-09-09 Eddie Hungabc9: make re-entrant (#2993)
2021-09-09 Eddie Hungabc9: holes module to instantiate cells with NEW_ID...
2021-09-09 Eddie Hungabc9: replace cell type/parameters if derived type...
2021-09-03 github-actions... Bump version
2021-09-02 Miodrag Milanovicupdate required verific version
2021-09-01 github-actions... Bump version
2021-08-31 Zachary Snowsv: support declaration in generate for initialization
2021-08-31 github-actions... Bump version
2021-08-30 Zachary Snowsv: support declaration in procedural for initialization
2021-08-30 github-actions... Bump version
2021-08-29 kittennbfive[ECP5] fix wrong link for syn_* attributes description...
2021-08-23 github-actions... Bump version
2021-08-22 ECP5-PCIeAdd DLLDELD
2021-08-22 Marcelina Kościelnickaopt_merge: Remove and reinsert init when connecting...
2021-08-22 Marcelina Kościelnickaopt_clean: Make the init attribute follow the FF's Q.
2021-08-21 github-actions... Bump version
2021-08-20 Pepijn de VosGowin: deal with active-low tristate (#2971)
2021-08-20 Miodrag MilanovićMerge pull request #2973 from YosysHQ/micko/optional_ex...
2021-08-20 Miodrag MilanovicMake Verific extensions optional
2021-08-18 github-actions... Bump version
2021-08-17 Sylvain Munautice40: Fix typo in SB_CARRY specify for LP/UltraPlus
2021-08-17 github-actions... Bump version
2021-08-16 Marcelina Kościelnickakernel/mem: Remove old parameter when upgrading $mem...
2021-08-15 github-actions... Bump version
2021-08-14 Marcelina Kościelnickaproc_prune: Make assign removal and promotion per-bit...
2021-08-14 github-actions... Bump version
2021-08-13 Rupert SwarbrickGenerate an RTLIL representation of bind constructs
2021-08-13 Marcelina KościelnickaAdd opt_mem_widen pass.
2021-08-13 Marcelina Kościelnickamemory_share: Add -nosat and -nowiden options.
2021-08-13 Marcelina Kościelnickamemory_dff: Recognize soft transparency logic.
2021-08-13 Marcelina KościelnickaAdd new opt_mem_priority pass.
2021-08-13 Miodrag MilanovićMerge pull request #2932 from YosysHQ/mwk/logger-check...
2021-08-13 Brett Witherspoonsv: improve support for wire and var with user-defined...
2021-08-13 github-actions... Bump version
2021-08-12 Marcelina Kościelnickamemory_share: Pass addresses through sigmap_xmux everyw...
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