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microwatt.git
2019-08-29
Anton Blanchard
Arty A7 reset pin is C2
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2019-08-29
Anton Blanchard
Merge pull request #7 from riktw/fusesoc_arty_a7
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2019-08-29
Anton Blanchard
Merge pull request #9 from antonblanchard/travis-fix
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2019-08-29
Anton Blanchard
A few Travis CI fixes
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2019-08-29
riktw
Added support for building for Arty A7 boards
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2019-08-28
Anton Blanchard
Merge pull request #5 from antonblanchard/travis-test
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2019-08-28
Anton Blanchard
Add an initial travis.yml
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2019-08-28
Anton Blanchard
Add srd and srw
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2019-08-28
Anton Blanchard
Add sim only divw
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2019-08-27
Anton Blanchard
Fix ghdl build error with pp_soc_memory
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2019-08-27
Anton Blanchard
micropython only requires 512kB of BRAM
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2019-08-27
Anton Blanchard
Merge pull request #6 from mikey/gif
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2019-08-27
Anton Blanchard
Add -Wall to CFLAGS
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2019-08-27
Michael Neuling
Add pretty gif demo of MicroPython on Microwatt to...
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2019-08-26
Anton Blanchard
Add missing argument to fprintf warning
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2019-08-26
Anton Blanchard
Add some initial FPGA synthesis instructions
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2019-08-26
Anton Blanchard
Rebuild hello world assuming a 50MHz clock
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2019-08-26
Anton Blanchard
Merge pull request #3 from olofk/plle2
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2019-08-26
Olof Kindgren
Add and use plle2 primitive for nexys boards
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2019-08-26
Anton Blanchard
Merge pull request #4 from sharkcz/build
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2019-08-24
Dan Horák
don't cross compile when on Power
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2019-08-23
Anton Blanchard
Add a simple hello_world example that also echos input
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2019-08-23
Anton Blanchard
Merge pull request #2 from olofk/fusesoc_nexys_a7
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2019-08-23
Olof Kindgren
Added synthesis target
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2019-08-23
Olof Kindgren
Add Nexys Video support
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2019-08-23
Olof Kindgren
Add FuseSoC core description file with Nexys A7 support
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2019-08-23
Olof Kindgren
Add constraint file for Nexys A7
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2019-08-23
Olof Kindgren
Expose ram init file and memory size through toplevel
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2019-08-23
Olof Kindgren
Add dummy clock generator
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2019-08-23
Anton Blanchard
Add a few more FPGA related files
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2019-08-22
Anton Blanchard
Initial import of microwatt
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