yosys.git
2015-09-20 Clifford WolfAdded "qwp" command
2015-09-19 Andrew ZonenbergImprovements to $display system task
2015-09-18 Clifford WolfAdded nlutmap
2015-09-18 Clifford WolfAdded lut2mux pass
2015-09-18 Clifford WolfCosmetic fix in Module::addLut()
2015-09-18 Clifford WolfAdded buffer detection to "abc -lut"
2015-09-18 Clifford WolfRenamed GreenPAK4 cells, improved GP4 DFF mapping
2015-09-18 Clifford WolfAdded support for "dfflibmap -liberty +/..."
2015-09-18 Clifford WolfAdded detection of "mux inverter" chains in opt_const
2015-09-18 Clifford WolfAdded $logic_not handling to fsm_detect
2015-09-18 Clifford WolfAdded $finish and $display to README
2015-09-18 Clifford WolfMerge branch 'feat-finish-disp'
2015-09-18 Clifford WolfAdded AST_INITIAL checks for $finish and $display
2015-09-18 Andrew ZonenbergInitial implementation of $display()
2015-09-18 Andrew ZonenbergInitial implementation of $finish()
2015-09-16 Clifford WolfFixed copy&paste typo in synth_greenpak4
2015-09-16 Clifford WolfAdded GreenPAK4 skeleton
2015-09-12 Clifford WolfFixed sharing of $memrd cells
2015-09-10 Clifford WolfFixed ice40 handling of negclk RAM40
2015-09-01 Clifford WolfFixed port ordering in "splitnets" cmd
2015-09-01 Clifford Wolfgcc-4.6 build fixes
2015-09-01 Andrei ErrapartRemoved unnecessary cast.
2015-09-01 Andrei ErrapartMicrosoft Visual C++ fixes in hashlib; template special...
2015-09-01 Andrei ErrapartMicrosoft Visual C++ fix for log.h.
2015-08-31 Clifford WolfFixed iopadmap help message
2015-08-31 Clifford WolfAdded SigMap::allbits()
2015-08-31 Clifford WolfUsing dict<> and pool<> in alumacc pass
2015-08-31 Clifford WolfAdded "yosys-smt2-wire" tag support to smt2 back-end
2015-08-22 Clifford WolfFixed handling of memory read without address
2015-08-22 Clifford WolfSwitched to Python 3
2015-08-18 Clifford WolfAdded sat -show-regs, -show-public, -show-all
2015-08-18 Clifford WolfBugfix in fsm_detect for complex muxtrees
2015-08-18 Clifford WolfProperly clean up unused "init" attributes
2015-08-17 Clifford WolfSmall corrections to const2ast warning messages
2015-08-17 Florian ZeitzCheck base-n literals only contain valid digits
2015-08-17 Florian ZeitzWarn on literals exceeding the specified bit width
2015-08-17 Clifford WolfMerge pull request #72 from cseed/master
2015-08-17 Cotton SeedAdded .travis.yml.
2015-08-16 Clifford WolfAnother bugfix for ice40 and xilinx brams_init make...
2015-08-16 Clifford WolfFixed Makefile rules for generated share files
2015-08-16 Clifford WolfAdded $tribuf and $_TBUF_ sim models
2015-08-16 Clifford WolfAdded tribuf command
2015-08-16 Clifford WolfAdded $tribuf and $_TBUF_ cell types
2015-08-16 Clifford WolfFixed opt_clean handling of inout ports
2015-08-15 Clifford WolfFixed generation of smt2 concat statements
2015-08-14 Larry DoolittleFix version strings for out-of-tree builds
2015-08-14 Larry DoolittleAnother block of spelling fixes
2015-08-14 Larry DoolittleKeep gcc from complaining about uninitialized variables
2015-08-14 Clifford WolfRe-created command-reference-manual.tex, copied some...
2015-08-14 Clifford WolfSpell check (by Larry Doolittle)
2015-08-13 Clifford WolfMerge branch 'master' of github.com:cliffordwolf/yosys
2015-08-13 Clifford WolfMore ASCII encoding fixes
2015-08-13 Clifford WolfFixed CRLF line endings
2015-08-13 Clifford WolfSome ASCII encoding fixes (comments and docs) by Larry...
2015-08-12 Clifford WolfAdded "write_smt2 -regs"
2015-08-12 Clifford WolfFixed "make clean" for out-of-tree builds
2015-08-12 Clifford WolfAdjust makefiles to work with out-of-tree builds
2015-08-12 Clifford WolfImproved handling of "keep" attributes in hierarchical...
2015-08-12 Clifford WolfFixed hashlib for 64 bit int keys
2015-08-12 Clifford WolfAdded SMV back-end 'test_cells.sh' script
2015-08-12 Clifford WolfMerge pull request #70 from gaomy3832/bugfix
2015-08-11 Mingyu GaoRemove unused blackbox modules in opt_clean.
2015-08-11 Mingyu GaoBugfix for cell hash cache option in opt_share.
2015-08-11 Clifford WolfFixed handling of [a-fxz?] in decimal constants
2015-08-11 Clifford WolfAdded missing ct_all setup to opt_clean
2015-08-10 Mingyu GaoBugfix for cell hash cache option in opt_share.
2015-08-09 Clifford WolfUse MEMID as name for $mem cell
2015-08-06 Clifford WolfMerge pull request #69 from zeldin/master
2015-08-06 Marcus ComstedtAdded iCE40 WARMBOOT cell
2015-08-05 Clifford WolfRemove some very strange whitespace in btor.cc (by...
2015-08-05 Clifford WolfBugfix in SMV back-end for partially unassigned wires
2015-08-04 Clifford WolfAdded ENABLE_LIBYOSYS Makefile option
2015-08-04 Clifford WolfAdded $assert support to SMV back-end
2015-08-04 Clifford WolfAdded libyosys.so build
2015-08-01 Clifford WolfMerge pull request #68 from zeldin/master
2015-08-01 Marcus ComstedtAdd -noautowire option to verilog frontend
2015-07-31 Clifford WolfAdded WORDS parameter to $meminit
2015-07-30 Clifford WolfFixed flatten $meminit handling
2015-07-29 Clifford WolfImprovements in BLIF back-end
2015-07-29 Clifford WolfFixed nested mem2reg
2015-07-27 Clifford WolfDon't write a 17th memory bit in ice40/cells_sim (by...
2015-07-27 Clifford WolfFixed "check" command for inout ports
2015-07-25 Clifford WolfSome cleanups in opt_rmdff
2015-07-25 Clifford WolfAdded "miter -assert"
2015-07-25 Clifford WolfKeep modules with $assume (like $assert)
2015-07-24 Clifford WolfImproved $adff simplification
2015-07-20 Clifford WolfiCE40 DFF sim models: init Q regs to 0
2015-07-18 Clifford WolfFixed techmap processes error msg
2015-07-18 Clifford WolfAvoid tristate warning for blackbox ice40/cells_sim.v
2015-07-16 Clifford WolfSome fixes in "select" command
2015-07-10 Clifford WolfFixed YosysJS.create_worker() usage of this.url_prefix
2015-07-06 Clifford WolfImproved liberty file test case
2015-07-06 Clifford WolfUpdated ABC
2015-07-06 Clifford WolfDo not collect disabled $memwr cells
2015-07-04 Clifford WolfImproved YosysJS WebWorker API
2015-07-03 Clifford WolfBugfix in fsm_extract
2015-07-02 Clifford WolfAdded "synth -nofsm"
2015-07-02 Clifford WolfFixed trailing whitespaces
2015-07-01 Clifford WolfAdded opt_const -clkinv
2015-06-30 Clifford WolfAdded logic-loop error handling to freduce
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